Research On Aging Mitigation Technology Of Integrated Circuits Considering Power

With the advent of semiconductor technology in the nanometer stage,the integration and performance of integrated circuits are increasing,but the resulting reliability problems are also increasingly prominent,which seriously threaten the development of integrated circuits.The most important reliability problem is power and the degradation effect caused by the Negative bias temperature instability(NBTI)effect.In many anti circuit degradation schemes,the multi input vector control(M-IVC)technology is suitable for large scale integrated circuits,and the extra area overhead is smaller.Therefore,compared with other methods,the scheme shows obvious advantages,but the existing M-IVC technology still has shortcomings in accuracy and dynamic power.Therefore,the above two points are improved respectively.The key to using M-IVC technology to mitigate circuit degradation is to find the optimal duty cycle.In this regard,this paper proposes an optimal duty cycle solution method based on critical path and Time-adaptive genetic algorithm.The method firstly considers the circuit's workload and logical topology structure and obtains an accurate upper limit of the aging rate.Then,combined with the timing margin design of the circuit,the potential critical path set is simplified and a condensed set of critical paths is obtained.Finally,this paper proposes Time-adaptive genetic algorithm to solve the optimal duty cycle of M-IVC technology.The experimental results show that the degradation rate of the circuit generated by the M-IVC technology with the optimal duty cycle of this paper is 4.7% at the lowest,and the average improvement rate is 18.29% compared with other literatures,reflecting the effectiveness of the proposed method in anti-aging.Taking into account the existing M-IVC technology in terms of power,this paper proposes a low-power M-IVC technology to mitigate the aging of the circuit caused by the NBTI effect.This technology analyzes the effects of different waveforms under optimal duty cycle constraints on circuit degradation effects and dynamic power and finds that: Under the constraints of the optimal duty cycle,the reduction of the switching frequency of the signal can not only guarantee the effect of the NBTI effect,but also reduce the dynamic power of the standby state.Then,according to the propagation law of the switching factor in the logic gate,this paper proposes a design scheme of random input waveform with low switching frequency with the best duty cycle as the constraint.This scheme can cooperate to alleviate the NBTI effect and dynamic power in the standby state.Experimental data show that,while ensuring the mitigation of the circuit degradation caused by the NBTI effect,Compared with double constrained random input vector control,the average dynamic power is reduced by 12.94%.Compared with the pseudo random scan input vector control,the average dynamic power of the algorithm is reduced by 16.96%,which verifies the effectiveness of the method.