| Both CAN bus and SPI bus are field buses and are widely used in the field of communications.With the continuous development of communication technology,its role has become more and more important.The research topic comes from an industrial control DSP chip with abundant peripheral resources.The eCAN module and the SPI module both exist as independent peripherals.When data is exchanged between two modules,RAM,interrupts,CPUs,etc.,need to be involved.This way of controlling and processing data exchange between two modules through the CPU will reduce the data processing rate of the CPU.For the complexity of data transmission between these two modules,this thesis proposes a bus data conversion module between two modules for fast data transmission between the two modules.The program not only improves the efficiency of the CPU,but also improves the accuracy of data transmission.The entire design uses multi-level modular,top-down,multi-level design concepts.Among them,the conversion module is the core part of the whole design,including identifier logic control,decoding/encoding module,asynchronous FIFO module and serial/parallel conversion module.For receiving messages from the eCAN bus,the identifiers need to be matched and filtered,and the data in the data field is received and stored by decoding the DLC in the control field;when sending data to the eCAN bus,encoding and identification are performed.The character control logic formats the data,making it a data format that can be received by the receive buffer in the eCAN controller.The above design solution can improve data transmission flexibility and reduce hardware complexity.In this thesis,Verilog hardware description language is used to describe each functional module in detail.NC-verilog is used to verify the design module.The simulation results show that the data can be transmitted on the two buses through the conversion module,which proves the feasibility and correctness of the design. |