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Design Of Low Power USB2.0 OTG Circuit

Posted on:2018-08-26Degree:MasterType:Thesis
Country:ChinaCandidate:C W ShanFull Text:PDF
GTID:2428330545461124Subject:Software engineering
Abstract/Summary:PDF Full Text Request
Universal Serial Bus(USB)as a simple to use and high-speed serial bus,since its inception,has been more and more widely used.OTG(On The Go)technology has greatly expanded the application of USB applications.Driven by the market,many domestic and foreign integrated circuit companies have set foot in the USB OTG circuit research and development.Suzhou Integrated Circuit and System Key Laboratory of Southeast University research and design of the SEP6210 chip independently,SEP6210 positioning as a thing network,home appliances control chip.In the field of things,the power requirements are more stringent in most applications,so the USB OTG circuit in the internal of the chip should have lower power consumption.In this thesis,the design scheme of the low power USB OTG circuit for the SEP6210 is proposed.According to the USB protocol and the OTG supplementary protocol,the overall framework of the circuit is designed in the top-down way,and then the module is designed,The main design of the module are as follows:host controller module,OTG controller module,DMA controller module,BIU interface module.In this paper,the author analyzes the source of power consumption at all levels in the design of integrated circuit,and makes a detailed comparison of the commonly used low power consumption technology.Combined with the actual RTL circuit of USB OTG circuit,the following three schemes are proposed and implemented:First,the use of gated clock technology,RTL circuit-level design of the global gated clock,the gate signals are controlled by registers.Second,the USB working state machine is split into six sub-state machine,combined with the process of USB packet transmission,open or close sub-state machine at the right time.Third,the use of dynamic voltage and frequency scaling technology,adjust the voltage and frequency according to the different working conditions of the system,in order to reduce power consumption.Finally,the USB OTG circuit is integrated into the SEP6210 chip through the AHB bus,and system-level simulation,FPGA verification and power analysis are performed.Simulation and verification show that the circuit conforms to the USB 2.0 and OTG protocol standards.The FPGA verification platform was used to test the speed of the full speed.Through the speed test of multiple U disk,the maximum speed of reading and writing at full speed was 719.15kB/s,the average speed was 618.17kB/S,read and write speed test results exceeded the expected target 500kB/s.Through the analysis of power consumption of circuit,IP core after adding low-power technology,the overall power consumption from 8.329 mW reduced to 6.324mW,power consumption decreased by 24.1%.In general,the USB OTG circuit designed in this paper has reached the requirements of design,with some reusability and generalization.
Keywords/Search Tags:USB-OTG, SEP6210, low power consumption, Gated Clock
PDF Full Text Request
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