FPGA Implementation Of Base-band Processing For DVB-S2 Transmitter

As a new generation digital satellite television standard,DVB-S2(EN 302307)employs state-of-art modulation and coding technologies,ensuring its high performance of transmission and spectrum utilization.Due to the fact that DVB-S2(EN 302307)will replace the first generation standard DVB-S in the near future and FPGA has many advantages in system design,e.g.,high flexibility,fluent in-chip resources,convenience for digital design,the FPGA design of baseband DVB-S2 system has received much attention from both academic and industrial community.Thus,it is of value to investigate the FPGA design and implementation for DVB-S2 baseband systems.The thesis is organized as follows.The DVB-S2 standard and its signal format are introduced first.Its component modules are then analyzed in detail,including module and signal stream modification,channel coding,modulation constellation mapping,and physical figuring,etc..Based on the analysis,the FPGA design and implementation for these modules are investigated,specifically,they include CRC coding,BCH coding,LDPC coding,QPSK mapping,NCO,filter design and interleaving.Various optimizations are studied to reduce the delay and improve the system efficiency and reliability.In the above work,we first design the modules by programming the codes via Verilog hardware descriptive language and simulate the design to test their validity in integrated development environment Modelsim.We then integrate the modules and download the tested codes to EP4CE10F17 board and the test results show that the design works well and meets the predefined specification.