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Research And Implementation Of A New Generation Of Foreign Trade 155 Speed Radar IF Digital Receiver

Posted on:2018-03-01Degree:MasterType:Thesis
Country:ChinaCandidate:Y Y DuFull Text:PDF
GTID:2358330512978451Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
Most modern radar receiver systems have applied digital technology,the development of radar digital receivers benefited from the improvement of digital technology.This paper focuses on the digital processing of radar intermediate frequency receiver,and makes a certain degree of research.At present,the radar equipment is developing rapidly,so the research and development of real time processing system for radar signal is significant and strategic to China's upgrading of radar equipment.Combined with the actual needs of 'velocity radar system for new generation of foreign trade 155,the paper designs a set of the radar intermediate frequency digital receiver based on FPGA.The theory bases for intermediate frequency digital receiving involve signal's bandpass sampling,digital down-conversion,multi-rate digital signal extraction.The important theories for filter algorithm include the maximum error minimization criterion,the alternation theorem and the intersection point set theorem.Hardware platform for digital receiver include the intermediate frequency amplifier,A/D conversion devices,FPGA chips.I realize the design of radar intermediate frequency digital receiver through analog pre-processing and analog-digital conversion hardware circuit,FPGA internal digital signal processing and logic control,following the modular design idea.In the process of FPGA intenal digital signal processing,a digital down-conversion method of polyphase filter structure is proposed to complete the signal spectrum shift based on the theories of digital quadrature down-conversion and distributed algorithm;The method of cascade combing filter and half-band filter is proposed to reduce baseband signal rate based on the theory of multi-stage extraction and Chebyshev approximation.I completes the real-time receiving of front-end intermediate frequency echo signal for the radar system combining FPGA hardware platform and VerilogHDL programme.The test result verifies the correctness and feasibility of the design.
Keywords/Search Tags:Intermediate frequency digital receiver, digital down conversion, polyphase filter structure, cascade extraction, FPGA
PDF Full Text Request
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