Testing Virtex-? FPGA Based On J750

With the rapid development in the field of integrated circuit technology,FPGA has the characteristics of growing fast,increasing market demands and promoting request for semiconductor craft technique,which makes it expand toward the direction to higher integration,stronger performance and more complicated inner structure.For the sake of reducing cycle on products design,lowering whole cost and efficiently overall testing FPGA,it is very important to research on the whole overlay test of logic resource.The topic was studied for the whole overlay test of FPGA logic resource,on the basis of the large scale integration automatically testings system J750 in this paper.The article elaborated on multi-module of FPGA interior chip resource structure,with Virtex-? series FPGA as the object of the research,introduced the familiar fault of digital circuit and correspond of test priniple and method,explained each inner module,direct-current parameter and alternating current parameter of Virtex-?.The fault pattern of its inner logic resource being analyzed and relevant test model established according to requirement for testing FPGA,so as to achieve purpose of the whole chip overlay test.At the same time,the test method to the type of Virtex-? FPGA whole resourceses,whole parameterseses was studied,forming an universal,efficient test flow process.Firstly,this paper fully showed the internal resource of XC2V1000 in Virtex-? series.In terms of inner structure,the resource modules of FPGA based on SRAM frame belong to digital circuit category,otherwise,there is mature test method to typical structure.A variety of testability design techniques,such as built-in self-test and scan chain structure were adopted to the all internal logic resources.Secondly,combined with the resource frame of Virtex-? series FPGA and test method to SRAM FPGA,lots of test models were also constituted,ultimately,to meet the full coverage test requirements.Now that the subject needs to set up a production test platform,it can not only test the functional parameters,but also need to test direct-current and alternating current parameters.Thirdly,the paper also describes FPGA's automatic test flow based on ATE.This is the key to achieve production test of FPGA,which can greatly reduce the FPGA's test costs.Perl scripting language was applied to dispose a large number of text operations,.meanwhile,software is more efficient than human to deal with the repetitive text operation,so that avoid to leading to the bug caused by the crew.Finally,the main structure,test principle and debugging method of J750,were stated to supply the technical theory with regard to XC2V1000 in the whole overlay test based on J750.According to an entire test flow process built in paper,which generated a steady test platform,and carried out the engineering yield of product,moreover,attained an expectable test result.