Dynamically Reconfigurable Fpga Circuit Testing Techniques

During the last decade, the new manufacturing technologies made feasible the development of SRAM-based FPGAs that became very popular. Their capability would make it possible in a relatively short development cycle to achieve the complexity of the circuit. However, nowadays SRAM-based FPGAs are really not considered enough reliable to be used in safety critical applications such as avionic and space ones. The main obstacle to their applications in this environment is represented by the high sensitivity to the radiation effects. There are many critical applications at home and abroad requires the use of the technology of reliability. At the same time, the system requires the use of FPGA design, in order to achieve saving cost for the purpose of maintenance. FPGA susceptible to external interference, and require the use of special design to achieve high reliability and scalability purposes.Most of the existing fault-tolerant technology is based on the radiation-hardened devices and fault masking via chip-level Triple Modular Redundancy. Those methods are highly cost and not fully use the reconfigurable nature of FPGA. With the FPGA dynamic reconfiguration technology can save power consumption and improve performance. Dynamic reconfigurable computing system can be achieved online diagnosis, fault tolerant and reliability. Reconfigurable computing technology combined with the standardization of the production and application customization features.The design uses a dual-redundancy and BIST test methods and the embedded processor to control FPGA dynamic self-reconfiguration. We achieve a fault-tolerant system. The system can apply to a variety of circuit types, on-line detection with fast response, high fault detection coverage and self-repair.The paper first discussed the subject of the background and significance of the development. The radiation effects on SRAM-based FPGAs. Describe current fault detection, fault recovery methods and the principle of dynamic reconfiguration technology. We focus on the dual-redundancy and BIST-based fault detection test methods. We implement the circuit with BIST function, circuit control module and the dynamic self-reconfigurable system based on embedded processor. We designed the hardware and software of dynamic self-reconfiguration system. Finally, the summary proposed a number of design improvements.