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The Algorithm Research About Three-level APF Virtual Flux Models Predict SVPWM And FPGA Implementation

Posted on:2019-04-27Degree:MasterType:Thesis
Country:ChinaCandidate:W Z ZhaoFull Text:PDF
GTID:2348330569478172Subject:Detection Technology and Automation
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In the harmonic control of low-voltage power grids,active filters(APF)with DSP chips as the control core have been widely used for their excellent performance.However,because of the orderly execution of the DSP,the real-time performance of the controller will be difficult to guarantee and the efficiency will be worse when multiple harmonics are simultaneously processed.However,the FPGA can solve this problem better because of its parallel processing characteristics.The three-level APF increases the switching states with respect to the two-level APF,which can reduce the output current ripple and has lower the pressure resistance of the device under the same capacity.To solve the above problems,this thesis studies the three-level APF based on FPGA and its implementation.The thesis analyzes and summarizes current relevant theories,techniques and applications of harmonic governance at home and abroad.Based on this,the mathematical model of APF with diode-clamped three-level topology is established,and the relationship between system parameters and system voltage and current is analyzed.Several harmonic current detection methods commonly used in engineering applications are studied and compared,and a multi-synchronous rotating dq harmonic detection algorithm is determined as the harmonic detection method of this thesis.In the occasion of poor power quality,APF has higher requirements on the performance of the phase-locked loop.In this thesis,the traditional three-phase phase-locked loop technology and the phase-locked technology under the unbalanced condition of the power grid are studied.Through theoretical analysis and simulation,the superiority of the phase-locked technology based on fast phase sequence separation is verified.For space vector pulse width modulation(SVPWM),it will inevitably introduce error when tracking the target current,which will cause the error between the output flux linkage controlled by the pulse width vector and the target flux linkage,this results in the accumulation of system flux errors in the closed-loop control loop using the PI current loop,it will make the current fluctuate violently at a certain moment and bring about the problem of switching noise aggravation.In this thesis,based on the idea of model predictive control(MPC),the SVPWM modulation technology based on the virtual flux model predictive control is proposed.The correctness and feasibility of the proposed algorithm are verified by simulation,and the advantages compared with traditional SVPWM modulation technology are verified.Based on the above work,this thesis designs a three-level APF based on the virtual flux model prediction SVPWM algorithm,designs the hardware circuit,determines and selects the relevant device parameters,and implem ents various key technologies in the digital control system using FPGA.A 50 A three-level APF prototype was built on the existing experimental platform and experiments were conducted.The experimental results show that the proposed algorithm is correct and effective.
Keywords/Search Tags:Three-level APF, Harmonic detection, Phase-locked loop, Model Prediction SVPWM, FPGA
PDF Full Text Request
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