| With the development of the digital demodulation technology,the research on highspeed demodulation system for signals with high utilization ratio of frequency spectrum becomes a hot topic in communications industry.Based on the theoretical analysis of synchronization algorithm,the thesis provides a parallel synchronization and demodulation algorithm in light of the characteristics of OQPSK modulation signal,and further completes its realization of high-speed synchronization and demodulation algorithmbased on the APRX(Alternative Parallel Receiver)architecture.In the thesis,carrier synchronization module is divided into carrier frequency and r phase synchronization submodule.After analysing some carrier frequency and phase synchronization algorithm,thesis uses parallel carrier frequency offset estimation based on Fourier transformation to correct the carrier frequency and uses parallel Ad Hoc algorithm to correct carrier phase.In the design of timing synchronization,the O&M algorithm is implemented in parallel in light of the characteristics of OQPSK modulation signals on the basis of comparing serval common algorithms.The validity and feasibility of the carrier and timing synchronization moduale are verified by MATLAB.Finally,the logic realization is completed on FPGA chip.In the end,this thesis takes a test of the demodulator.It turns out that the demodulator can demodulate the OQPSK modulation signal when the symbol rate is 360 MHz,meanwhile,carrier frequency synchronization module and carrier phase synchronization module can correct ?6MHz carrier frequency offset together.The timing synchronization module can gets the location of the best sampling points of I and Q channels of the OQPSK signal respectively and holds it in place.The EVM of OQPSK signal is within 10% RMS,which meets the requirements of high speed communication demodulator.This thesis completes the design and realization of the high speed OQPSK demodulator. |
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