Design And Verification Of The System Management Based On The Industrial Control Chip

With the "Made in C hina 2025" and the rise of things,industrial control of the core industrial control chip is bound to rapid development.Industrial applications continue to enrich the field of application,showing a huge difference between the application of the scene,making the industrial control chip had to be more complex design to adapt to the great challenges posed by different applications to enhance the cost of the chip,while the industrial control chip in order to Meet the application requirements will be integrated into a large number of IP modules,which also makes the communication between modules,collaborative work and data processing has become extremely complex,increased the difficulty of centralized management module,chip ener gy consumption has become a constraint cost-effective and stability of the chip An important factor in.Combined with the author in the internship company to participate in the project to complete the work of the paper,the author of the study mainly used to solve the above problems.This paper is based on the project company based on the completion of the project is based on the company launched an industrial control So C chip in the system management module,the module's main purpose is to make the chip can be more fit the market application,Flexible configuration and centralized management,easy to manage the chip and enhance the chip performance.First,the paper will describe in detail the implementation process of the system management module.Accord ing to the realization function,the design logic is subdivided into five core sub-modules according to the realization function.Then,the functions of the five sub-modules are designed in detail,including the working mode management,the power domain switch management,Software communication,clock source generation,clock division,clock gating,clock switching,reset management,pin multiplexing and power management,in the description of the process will be introduced in the design of the method used,the difficulties encountered Implementation.Secondly,the chip low power consumption introduced the concrete realization.According to the practical application of the chip and market positioning proposed a reasonable and feasible low-power program,to meet the requirements of the chip low-power designrequirements as far as possible with a simple low-power design to achieve,through the use of clock regulation,power gating,clock Gating,threshold adjustment and other means to achieve the chip low-power program,the use of standard process to achieve the chip power domain division and control unit description,and ultimately to UPF form.Finally,the paper describes in detail the module validation process.Based on the project,the construction process of the verification platform is described in detail.The analysis of the simulation results shows that the actual behavior of the module has satisfied the design requirements,and the functional coverage of the module and the statistical method used in the project are given.The coverage of the module is 100% favorable,and the completeness of the module verification and the correctness of the design are described.At the same time,the problems encountered in the simulation of the module-level simulation and the solution are introduced.The methods used in the chip power estimation are introduced.To the difficulty and the solution,and gives the chip power consumption report.In the chip power consumption prediction process,the chip running at full speed and the chip in the deep sleep contrast,the entire chip power consumption reduced by 96.75%,proved the effectiveness of the chip low power strategy.Finally,the entire So C chip in the Xilinx FPGA chip K intex-7 series XC7K325 T on the realization of the Linux kernel transplant,a favorable proof of the system management module function is correct.