PCIE Low Power Consumption Design And Verification Based On Mobile Baseband Chip Subsystem Control Unit

In recent years,the power consumption of the chip has increased rapidly with the increase in chip integration and complexity.Excessive power consumption of the chip leads to a series of problems,such as poor device stability,reduced package reliability,and reduced endurance of electronic products.Power consumption has become an important factor affecting the development of integrated circuits,and advances in low-power design research have become increasingly critical.The low-power design of chip have corresponding design methods at each design level.The research of this paper focuses on the research of low-power design at the RTL level.This paper hopes to study the low-power design method based on the subsystem local control module to reduce the power consumption of the PCIE module at the RTL level by understanding the current low-power design method of chip and analyzing the low-power mechanism of the PCIE module.Firstly,analyze the ideas and methods of several low-power designs commonly used at this stage and grasp the basic theories and ideas related to low-power consumption design at the RTL level through consulting the relevant information about SOC low-power design and studying the existing SOC low-power design in the current project.Then understand the basic architecture and functions of the PCIE module,and analyze the existing power management mechanism inside the PCIE module.At the same time,understand the basic architecture and functions of the chip subsystem local control module and analyze the mechanism by which the local control module interacts with other modules inside the subsystem.Then,two PCIE low-power design methods at the RTL level are implemented by controlling the power and clock of the PCIE module.The ideas of the two PCIE low-power design methods implemented in the paper are as follows.The first is to turn off the power of the PCIE power domain that does not need to work while the power state transition inside the PCIE is performed through the interaction between the PCIE module and the subsystem control module.The second is to dynamically adjust the working clock frequency by detecting the working state of the corresponding PCIE power domain to achieve automatic reduction of the clock frequency in the idle state.At the end of this paper,the function verification and power simulation of the two low-power designs of the PCIE module are performed,and the power consumption data shows that the first design can reduce the operating power consumption of PCIE Controller by about 27.0%,the second design can reduce the operating power consumption of the PCIE Controller by about 1.5%,and achieving two designs can reduce the operating power consumption of the PCIE Controller by about 27.4%,thus proving that the designs achieve the intended purpose,that is,the power consumption of the PCIE module is reduced to a greater extent during the PCIE module running by hardware mechanism.The difference between the PCIE low-power design in this paper and the previous project is that a greater degree of automatic control of the power and clock of the PCIE module during the PCIE module running is achieved by adjusting the hardware mechanism.Firstly,add a retention cell to the UPF file to save the module information before the power domain is powered off and allow the VMAIN power domain to be turned off in the L12 link power state for realizing the function of automatically turning off the VMAIN power domain through the hardware mechanism.Secondly,the clock frequency in the idle state or the clock frequency in the working state is selected by determining the working state of the module in the VMAIN power domain for realizing the function of automatically adjusting the working clock frequency through the hardware mechanism.The low-power design methods proposed in the paper is based on the research of low-power design ideas commonly used at the current stage and the analysis of existing designs in the project.The functional verification and power simulation ensure the correctness of the designs,and the designs have good project foundation and practical value.