| With the development of digital electronic technology,digital equipment has a wide range of applications,a large number of analog signals need to be converted to digital signals through the ADC,the ADC conversion accuracy,speed and power consumption has also become one of the bottlenecks of such digital equipment work.At present the design of voltage-mode parallel ADC due to its own structure,while achieving high conversion rate,resolution is reduced,power consumption is increased.The current mode structure of the circuit work fast,has a large dynamic range,and it's power consumption is low as it work with high frequency.So combined with the characteristics of both,designing a high-speed,low-power analog-to-digital converter based on current mode technology is of great importance.The paper combines the characteristics of ADC parallel structure,two-step structure and current-mode circuit structure,based on the deep analysis of the traditional voltage mode twostep ADC,designed a current mode ADC.The paper completes the design of current comparator,current rudder DAC,D flip-flop and encoder.This paper completed board-level verified for encoder with Xilinx FPGA integrated development environment Vivado 2015.4 software combined with Xilinx Mini-ITX development board.The first stage 3bit current mode ADC built by the main module can realize the conversion of the input current signal.The paper concludes two levels of 3bit current mode ADC,and realizes two-step structure.In the paper,current-mode ADC are designed using the CSMC 0.5um CMOS process library,and using the SpectreVerilog simulator in Cadence software for analog-digital simulation.Through the simulation results of the circuit,the input current signal range is 0mA-4mA,and the minimum resolution current is 62.5uA.Circuit operating frequency can reach 1MHz.It reduces the numbers of 49 current comparators compared to full parallel current mode ADC.The 6-bit current mode ADC in this paper meets the design requirements. |
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