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The Embedded Data Processing Acceleration Technology Based On MPSoC

Posted on:2018-02-01Degree:MasterType:Thesis
Country:ChinaCandidate:H J ZhangFull Text:PDF
GTID:2348330536988079Subject:Engineering
Abstract/Summary:PDF Full Text Request
With the development of the computer architecture and the semiconductor technology,embedded devices and embedded system are widely used in our daily life.Drived by the growth of the embedded market,the blog,social networks,location-based services and many other mobile Internet applications have been developed explosively.At the same time,with the advent of the cloud computing,Internet of Things(IoT),a variety of logs,images and videos are growing at an unprecedented speed,so collecting and processing of large datasets on embedded systems become increasingly important.Meanwhile,MPSoC(Multi-Processor System on Chip,MPSoC)architecture has become a trend in the design of high performance embedded system.Therefore,to enable embedded processors with more data processing capabilities,this thesis presents a MapReduce-based multiprocessor system-on-chip.Distributed parallel programming model match well with the distributed underlying hardware platform,which makes the multi-core architecture can not only accelerate the speed of processing large datasets,but also simplify the complexity of parallel programming paradigm.This thesis adopts the SystemC,which is a software and hardware collaborative design language,to design the system-level model of the full multiprocessor architecture.Through analying the performance of the typical MapReduce applications and adjusting the MPSoC architecture,to achieve high performance multi-core processor hardware platform for embedded data processing.On the other hand,embedded system focuses on the specific application,this thesis utilizes the application specific instruction set processor(ASIP)design method to achieve a high performance? low power consumption and programmable embedded multiprocessor platform.We use nML instruction set language to describe the decidated processor element,and then we implement the proposed MPSoC in cycle-accurate SystemC and evaluate its performance in Synopsys Platform Architect.Results show that the proposed MPSoC can achieve up to 2.1x overall performance improvement over the current general purpose multicore processors in typical MapReduce applications.
Keywords/Search Tags:Multiprocessor system-on-chip, embedded systems, application specific instruction set processor, parallel programming
PDF Full Text Request
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