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The Study And Design Of Multi-buses Protocol Converter Based On High-performance X-DSP

Posted on:2017-10-07Degree:MasterType:Thesis
Country:ChinaCandidate:J X LiuFull Text:PDF
GTID:2348330536967492Subject:Software engineering
Abstract/Summary:PDF Full Text Request
X-DSP is a kind of high-performance floating-point Digital Signal Processor that developed positively by our school.It is mainly used in radar signal processing,image processing,precision guidance,flight control,secure communications,and other fields.X-DSP has complex internal bus system realizing non-blocking data transmission.This paper has designed the EDMA2 AXI bridge and AHB2 EDMA bridge based on studying of EDMA,the AXI bus protocol and the AHB bus protocol.The bridge can finish the seamless docking between different bus protocols.It can implement that DSP or external host accesses the internal space highly-speed.This paper mainly includes the following parts of work which have been done:1.EDMA2 AXI bridge implement the converter from EDMA to the AXI bus protocol.In logic design,using address decoder implements the select function of CrossNet.We control and cache the address and data by using Buffer to improve the efficiency of data transmission effectively.For half-word or byte,we copy the effective data bits to meet the requirement of 32-bit data bus.Converting control information to meet requirement of AXI bus protocol and complete continuous data request of EDMA.2.AHB2 EDMA bridge converts the AHB bus protocol to EDMA.In logic design of this part,using two synchronous FIFO between AHB-Slave and EDMA interface cache and control the data transmitted,improving the efficiency of data transmission effectively.In view of WRAP transmission the first address is unaligned of the total number of bytes,meet the accessing requirement of EDMA on continuous address,by adjusting the transmission address and read-pointers of FIFO in writing operation.In addition,this design can also accomplish booting X-DSP through AHB-Slave interface.3.Complete sufficient simulation verification of module and system level of this design,and calculate the code coverage.We adopt the standard AXI2 AHB bridge including AXI-Slave and AHB-Master interface to complete seamless connecting of EDMA2 AXI bridge and AHB2 EDMA bridge.We configurate EDMA by CPU and start the channel transmission,accomplishing the system level simulation verification of whole design easily and efficiently.Result of verification indicate design meets the functional requirements.Synthetize the design adopted 65 nm CMOS technology library,under the worst working condition.It can be seen from results that the multi-buses protocol converter meets the requirements of X-DSP system.The area of EDMA2 AXI is 39556.319766um2.Dydamic/static power is 6.3930mW/33.5022 uW.The area of AHB2 EDMA is 26887.679585um2.Dydamic/static power is 2.5066mW/20.4092 uW.
Keywords/Search Tags:Bus Protocol, Bridge, Synchronous FIFO, Buffer, Data Transfer
PDF Full Text Request
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