Design And Implementation Of Transfer Bridge RapidIO Oriented AXI Bus And YHFT-DSPXNAC Bus

YHFT-DSPX is our independent development of a high performance floatingpoint digital signal processor, is also a larger scale, higher frequency, higher operation ability with 64 bit DSP in China, currently. Its working frequency can reach the standard of 1GHz, meanwhile the highest frequency can reach 1.25 GHz. The DSP has a wide applicable prospect in communications, aerospace, deep-sea detection, automatic control, radar and other fields. High-speed serial data standard interface is one of the necessary peripheral contemporary multi-core DSP, in the paper based on the YHFT-DSP chip, the design and implementation of the switching components have AXI interface SRIO and multi-core on chip network RNS, through the DSP component can achieve rapid configuration of the SRIO interface and the SRIO peak data rate transmission, this paper mainly completed following several aspects of the work.1. A detailed analysis of the RNS component support NAC protocol with SRIO support AXI protocol, function features and functional requirements and in depth study of the RNS components at both ends of the IO port, on the basis of the completion of the design, protocol transfer bridge transfer protocol and structure.2. Design and implement the bridge between NAC protocol and AXI protocol, Which is divided into five independent modules: namely the RNS host configuration module, as a host machine completed the RNS to IP core configuration of SRIO device; The RNS host read module and RNS host write module to realize the RNS as a host device to send SRIO to read from the machine write request; The SRIO host read module and SRIO host write module respectively SRIO as a host device to transmit from the RNS read and write requests, especially SRIO as host read processs realized the out of order return data according to the requestof order, through the design of asynchronous FIFO in all design module to process the across clock domain problem of signals.3. Completed the transfer bridge logic simulation, optimization and performance evaluation of RNS-SRIO transfer bridge. and the Module, component and system level simulation show that the transfer bridge can complete the data transmission where is between RNS and SRIO in different transmission configuration. With the synthesis tool guidance logic to optimization transfer bridge, The module area and power consumption are reduced by 33% and 25% than before, The protocol through the bridge of read/write channel transmission rate simulation evaluation shows that the highest literacy rate are 28.26 Gbps and 16 Gbps, far more than the 10 Gbps bandwidth of target SRIO controller.