Font Size: a A A

Research And Design On Multiple Boot-load Mechanism Of SoC

Posted on:2018-10-09Degree:MasterType:Thesis
Country:ChinaCandidate:Y D SuFull Text:PDF
GTID:2348330518486496Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
With the rapid development of very deep submicron(VDSM)technologies,the System-on-a-Chip(SoC)based on Intellectual Property(IP)reuse technology has become the mainstream of the current integrated circuit(IC)design.Generally speaking,the SoC is usually embedded with the Central Processing Unit(CPU)or Digital Signal Processor(DSP)for executing the user's program,which in most applications is stored in the off-chip memory.Therefore,the SoC must be able to load the user's program to the on-chip high-speed memory,namely,possessing the boot-load mechanism.Aiming at the features of SoC development domains,including the strictly controlled chip aera,the limited number of pins and the short developing time,this thesis proposes a multiple boot-load mechanism for the general SoC.The multiple boot-load mechanism is based on the serial interface,taking the state machine as the control core.In order to verify the mechanism,an 8-bit SoC verification chip is constructed based on an enhanced 8051 CPU core,the Inter-Integrated Circuit(I2C)core and the Serial Peripheral Interface(SPI)core.Then,based on the above-constructed SoC verification chip,both the I2 C and SPI boot-load mechanisms are designed and validated.Finally,according to the requirements of a self-developed commercial data transfer SoC based on the USB 2.0 interface,the boot-load mechanism based on I2 C is applied and realized.The test results show that the I2 C boot-load mechanism makes the SoC able to load the user's programs successfully.The main research content is summarized as follows.1.The main developing processes of SoC are described,including the IP reuse,logic synthesis,SoC testing technology,etc.Then the key technologies are discussed,including the on-chip bus design technology,SoC software and hardware co-verification,and the interface protocols used in the SoC multiple boot-load mechanism.2.Taking the state machine as the control core,a multiple boot-load mechanism is designed by hardware for SoC without the on-chip Read-Only Memory(ROM).Its working principle can be described as follows.Firstly,the data format of user's program is customized.Secondly,the boot-load module is designed to reset the CPU right after the SoC is powered on,and to control the boot-load interface modules and the program space.Thirdly,according to the user's program customized data format,the boot-load module moves the user's program from the off-chip memory to the on-chip program space.Finally,the CPU is released from the reset state and executes the user's program after it has been moved completely.3.In order to verify the boot-load mechanism,a verification platform of SoC with an 8-bit enhanced 8051 as the CPU core is constructed.Based on the SoC verification platform,the SoC with the I2 C and SPI boot-load mechanisms is designed to verify the proposed SoC boot-load mechanism.Firstly,the system-level and the module-level designs of the SoC are completed,including the designs of the whole frame of the chip,the on-chip interconnect module and two kinds of interface boot-load mechanisms.Then the HW/SW co-verification platform is built to verify the function of the two SoC boot-load mechanisms.After that,the user's program to verify the function of the main modules in SoC is designed and the system-level verification is carried out.The function validity of the I2 C and SPI boot-load mechanisms is demonstrated.Because the direct port stimulation in the testbench is uncontrollable and it is difficult to observe the results visually,a novel stimulus generation mechanism is designed,which calls a port stimulus file through a stimulus generation module to generate the timing signals corresponding to the ports.4.The logic synthesis of the SoC verification chip is completed by using the Design Compiler.According to the requirements of the data transfer SoC based on USB interface which is designed by our laboratory,the I2 C boot-load mechanism is applied to the SoC.After the chips are fabricated,the boot-load mechanism is evaluated by wafer testing and package testing.The results show that the SoC chip can transfer the user's program to the on-chip memory successfully by the I2 C boot-load mechanism.In summary,by considering various aspects such as the short design period,the strict control of the circuit scale and the low cost,this thesis provides a universal SoC boot-load mechanism based on the design of customized user's program data format and boot-load module.The functional verification is carried out by constructing an SoC verification chip.Furthermore,the test results from our data transfer SoC based on USB interface which uses the designed I2 C boot-load mechanism show that the user's program can be successfully transferred to the on-chip memory via the I2 C boot-load mechanism without on-chip ROM,providing a useful reference for SoC developers to design boot-load mechanisms.
Keywords/Search Tags:boot-load mechanism, SoC design, SoC verification, stimulus generation mechanism, SoC test
PDF Full Text Request
Related items