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Simulation Research And Analytical Model Of Novel SOI LDMOS Device

Posted on:2017-10-29Degree:MasterType:Thesis
Country:ChinaCandidate:X F MengFull Text:PDF
GTID:2348330518473021Subject:Information and Communication Engineering
Abstract/Summary:PDF Full Text Request
As the most widely used lateral power device, the SOI (Silicon On Insulator) LDMOS(Lateral Double-diffused Metal Oxide Semiconductor) device has been widely used in the Switching Circuit and Power Amplifier Circuit, which ask for high speed and integration density but low power consumption, as the core device. The SOI Technology, Micro Electronics Technology and Smart Power Integrated Circuit have been combined to the SOI LDMOS device at the same time. It can also be forecasted that the SOI LDMOS device will be widespread used in the Industrial Automation, Weaponry Equipment, Aerospace, Power Electronics and some other high-tech fields. So, it is really important and worthy to do some further researches about the SOI LDMOS device. By studying the structures which have already been proposed by the other scholars, an new SOI LDMOS structure has been proposed in this paper, the device model has also been presented at the same time, finally the structure has been optimized by using the device model. Specific research contents are as follows:(1) The Trench Gate Variation of Lateral Width (VLW) SOI LDMOS device with High K material Dielectric has been proposed. By using the 3-D Sentaurus device simulator, the characters and the performances of the VLW structure and the Super Junction (SJ) structure have been investigated and compared. For a 20?m long and 2?m wide drift, the VLW structure device can get a 405V breakdown voltage (Vb) and a 27.165 mQ·cm2 specific on-resistance (Ron,sp). Compared with the SJ structure, the Vb of the VLW structure has been improved 58.8%, while the Ron.sp is only 25.65% of the one of the SJ. It has also been proven that the leakage current, gate charge and the process tolerance of the VLW structure are also better than the SJ structure. The charge unbalance can also be avoided by using the VLW structure, the feasible fabricate process of the VLW structure has been presented.(2) The equivalent drift model which based an equivalent capacitance idea has been proposed. By using the equivalent drift model, an analytical model of the VLW structure has been presented, which includes an electric potential and field distribution model for the drift region, a breakdown voltage model and a on-resistance model for the device. Due to the complex device structure, there are only few analytical models have been proposed for the 3D structures. While the equivalent drift model presented in this paper can be used not only for the lateral device, but also can be used for the vertical one. The whole device model, which deduced by using this equivalent drift idea, can effectively forecast the electric potential and field distribution and the other characters. The breakdown voltage model and the optimum drift doping concentration criterion, can guide how to design the VLW structure device accurately and laconically. The succinct expression can help understanding the working principle of the device more clearly.(3) By using the analytical model and the 3-D Sentaurus device simulator, the differences between the characters made by the specific device parameter have been deeply studied. The parameters of the device, such as the length and width of the drift region, the doping concentration and thickness of the drift region, the thickness of the BOX layer and the material of the dielectric layer,have been optimized to get the best Vb and Ron,sp characters.The characters of the optimized device structure have been presented and compared with the Silicon Limit, it can be proven the VLW structure can break the Silicon Limit.
Keywords/Search Tags:SOI LDMOS, Breakdown Voltage Model, Specific On-resistance Model, Equivalent Drift, High-K Material
PDF Full Text Request
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