Research On Optimized Design Of SAR ADC Based On 180 Nm CMOS Technology

In particle physics experiment,the physics information is converted to electrical signals by detectors,and then processed by readout electronics to obtain the information of time and charge,etc.Charge measurement is very important,and the results correspond to the energy loss during the process of particle interaction with detectors,which plays an essential role in energy spectrum measurement and particle identification,etc.One of the important methods in charge measurement is based on amplifying,shaping combined with digital peak detection.Good measurement precision and linearity can be achieved with this method,and thus it is widely applied in physics experiments.The input signal is first amplified and then shaped to a quasi-Gaussian signal,which is then digitized by the Analog-to-Digital Converter(ADC),and finally the charge information can be obtained through digital signal processing.In this scheme,the ADC is one of the key parts,the quality of which has direct influence on the overall system performance.Due to the tremendous amount of channels in large scale physics experiments,high density and low power consumption electronics design is required,and therefore,Application Specific Integrated Circuit(ASIC)is a preferable choice.In this domain,design of Successive Approximation Register(SAR)ADC is a research hot spot,since good sampling speed and resolution can be achieved accompanied by good performance on power consumption.This dissertation focuses on optimized design of SAR ADC ASICs,and actually finishes prototype ASICs,aiming at the requirement of one key detector in one national key scientific infrastructure.This ADC is expected to finally be used in the readout electronics of Water Cherenkov Detector Array(WCDA)in Large High Altitude Air Shower Observatory(LHAASO).WCDA covers an area of around 8,000 m2,in which 3,120 Photo-Multiplier Tubes(PMTs)are scattered under water.High precision time and charge measurement are required over a large dynamic range of 1 to 4000 Photo-Electron(P.E.).Aiming at such application purpose,studies were made on the optimized design of SAR ADCs based on 180 nm,and the key task is to enhance the ADC performance.This dissertation is organized as follows.The first chapter introduces the charge measurement approaches in physics experiments,as well as the background information of the WCDA in LHAASO.Performance requirements of the ADC are also listed.The second chapter introduces the basic knowledge of the ADC,such as its working principle,structure and parameters to indicate its performance.The ADCs applied in physics experiments are investigated,which form good references for the design work in this paper.In the third chapter,the optimized design scheme of SAR ADC is presented.Analysis is made on factors that limits the performance of SAR ADCs,and detailed discussion are presented on the nonlinearity of Digital-to-Analog Converter(DAC)inside ADC ASIC,which is caused mainly by the mismatches among the storage capacitors,and the optimized design scheme is finally outlined.The design of the prototype ASIC is presented in the fourth chapter,which includes the key circuits and implementation of multiple channels to verify different methods.The fifth chapter presents the test results of the ADC ASIC.Series of tests were conducted on the ADC prototype ASIC based on IEEE standard.Results indicate that SINAD is enhanced by around 4 dB in the upper limit of the base band(i.e.the first Nyquist zone),and an Effective Number Of Bit(ENOB)better than 9 bits is successfully achieved at 31.25 MSPS sampling rate over the whole frequency range of the whole base band.The results show that she sampling speed is up to 31.25 MSPS and the ENOB is better than 9 bits in the whole Nyquist zone.The result shows that the goal of the ADC is reached.The last chapter concludes this dissertation and introduces plans for future research work.