Research On Offset Voltage Compensation Technology Of DRAM Sense Amplifier

With the rapid development of information and communication technology,the whole society has entered the era of intelligence.Intelligent devices are closely linked with the society.The popularization and optimization of intelligent devices bring people better user experience,and also the requirements of hardware in intelligent devices become higher and higher.DRAM,as the smallest area and most widely used memory,has been in high share in the whole memory market.With the continuous development of process technology and process nodes,sense amplifier(SA),as an important part of DRAM,the threshold voltage mismatch of the transistor,which is the basic component of DRAM,will become more and more serious,and with the increasing of threshold voltage mismatch,the performance of SA to read data gradually decrease.This article gives a symmetrical structure of DRAM SA to improve the performance of read-out data of SA.The primary coverage as shown below:This paper first introduces the structure and principle of DRAM,and focuses on the DRAM reading operation.Then the working process of the conventional DRAM SA is introduced.The conventional SA is mainly composed of two pairs of inverters connected by cross coupling.One end of the line is pulled to high level by differential input signal of two bit-lines,and the other end is pulled to low level,so as to achieve the operation of reading "1" or "0".Because the main structure of SA is two inverters,the reason of the offset voltage and the influence on SA are analyzed by analyzing the influence of the threshold voltage on the inverter when the threshold voltage changes.Then three kinds of compensation technologies for the offset voltage are introduced,and the merits and shortcomings of the three kinds of SA are analyzed and summarized.Finally,this paper optimizes the offset compensation technology of different sense amplifiers,and proposes a symmetric flip point compensation sense amplifier(SFPCSA).The sense amplifier proposed in this paper determines the read bit line and the reference bit line according to the input bit line address.In the offset compensation stage,the read bit line voltage is compensated to the flip point of the inverter,the reference bit line voltage is adjusted by the current mirror,and the reference bit line voltage is changed by the high gain of the flip point of the inverter in the reverse amplification stage,which further improves the sensing margin and greatly improves the sensitivity and the offset voltage is reduced.In 65 nm CMOS process,through simulation experiment,it can be concluded that SFPCSA can effectively compensate the offset voltage in SA and greatly improve the reliability of SA data reading.