A SRAM Sense Amplifier Based On Self-write-back Mechanism

With the improvement of microelectronics technology and enhancement of IC design ability,the feature size of chip is reduced constantly to SOC(System on Chip).Nowadays,SOC has become the mainstream technology of IC design,so the SRAM,as an important storage module,also has been developed faster.In order to improve the read performance of SRAM,this paper improves the circuit structure of the original self-write-back sense amplifier.The new sense amplifier,which has faster speed with lower offset voltage and its unique circuit structure,can solve reading damage problems of SRAM better.It will pave the way for some SRAM technology application which may cause read destruction.The main points of the paper are as follows:First:the paper introduces the classification of memory,and points out the importance and significance of researching SRAM sense amplifier.Based on the background introduction,this paper introduces the basic structure and modules of SRAM(cell circuit,memory array,decoding circuit,sense amplifier)and its working principles.Taking six tube units for example,the paper introduces the read,write and hold functions of SRAM.This paper will emphasize the importance of the sense amplifier,analyze the design difficulty of sense amplifier.Second:the paper theoretically analyzes the typical sense amplifier,such as current mirror sense amplifier,cross-coupling type sense amplifier,latch-type sense amplifier and current sense amplifier(MCSA).It describes their circuit structures and points out their advantages and disadvantages.In the SMIC28nm environment,the paper investigates the effects of temperature and voltage on the current mirror sense amplifier,cross coupling sense amplifier and latch type sense amplifier.For the most widely used latch-type sense amplifier,it analyzes the influence of the balance tube on the performance of the latch-type sense amplifier from three aspects:theoretical analysis,circuit simulation and measurement.Third:the paper analyzes the structural characteristics,working principle and application significance of the original self-write-back sense amplifier.In this thesis,a new self-write-back sense amplifier circuit structure is proposed.After analyzing its circuit structure and working principle,the author sets three process corners:tt,ss and ff in SMIC28nm environment.The paper respectively probes into the effects of different voltage and different load on the speed performance of two self-write-back sense amplifiers;it tests the power dissipation of the proposed sense amplifiers in three process corners;compares the offset voltages of the two amplifiers in three process corners.Specific performance of the new designed self-write-back sense amplifier in ss,tt and ff process corners,when discharged to 200mv,the speed of the proposed self-write-back sense amplifier is improved a maximum by 40.0%and minimum by 21.70%than the original sense amplifier,when discharged to 100mv,the speed is improved a maximum by 44.30%and minimum by 27.40%.It can be concluded from above data that new proposed self-write-back sense amplifier has more advantages on speed and offset voltage.It is only in the ff process corner,the offset voltage is slightly larger than the original sense amplifier;in the tt process corner,the offset voltage of the new proposed self-write-back sense amplifier is reduced by 23.23mv,its performance is increased by 69.06%;in the ss process corner,the offset voltage of the new proposed self-write-back is reduced by 21.405mv,and its performance is increased by 77.81%compared with the original amplifier.