Research Of Key Circuit Of Analog Front End For Passive UHF RFID Dual-port Tag

With the promotion and advance of Internet of Things(IoT),RFID technology aroused people’s attention once again.As the core part of RFID system,the tag directly determines the system performance.However,the vast majority of tag adopts single port design up to now,which means that the RF signal for power supply and communication comes from the same antenna.The energy gathered from antenna decreased with increasing the working distance,and it is difficult to meet the requirements of the power supply and signal transmission,thus the communication between tags and readers is interrupted.In order to guarantee long distance communication of the RFID system,this thesis studied the tag from system architecture and circuit power consumption.Firstly,we proposed a dual port tag with the function of intelligent selection,and designed the circuits for intelligent selection based on UMC 0.18μm CMOS technology.Then,the RF circuits in the tag,including the rectifier circuit,the voltage regulator circuit and the modulation/demodulation circuit,were optimized to further reduce the power consumption of the tag.The layout design and simulation of the designed circuits were completed finally.The designed intelligent selection circuit consists of a comparator and a SPDT(Single Pole Double Throw)switch.On the basis of theoretical analysis,a dynamic comparator and a static comparator were designed,and their performance was compared.Then,we analyzed the basic principle and the parameter of switch circuit,and a SPDT switch composed of MOS transistors was designed.The simulation results shown that,the comparator has a delay of 56.2ns,and the power consumption is 463 nW,meeting the target of the low consumption.The insertion loss of the switch circuit is-0.64 dB,the isolation is-45.8dB,and the return loss is less than-21 dB,indicating a good matching performance.In the rectifier circuit,a MOS transistor with zero-threshold was used to replace the common one to obtain a high output voltage.The regulator circuit includes a starting circuit,a reference circuit and an error amplifier.The starting circuit would be stopped when the regulator worked normally,and the error amplifier was designed by a single low consumption two-stage operational amplifier to decrease the power consumption.The simulation results indicate that,the regulator with 3μW power consumption can provide a stable power supply voltage of 1.8V,ensuring the proper operation of the circuits in the tag.The modulator and demodulator adopted ASK modulation were designed.To reduce the chip area,the reference voltage of hysteresis comparator in the demodulator is extracted from a low-pass filter,which replaces the traditional RC network circuit.The modulation circuit is designed on the basis of back scattering technology.The simulated results indicate that,the demodulation circuit can successfully demodulate the 915 MHz carrier and 40 KHz modulation signal.The modulation circuit could add the tag information to the carrier signal,and complete the conversion from digital signal to analog signal.The power consumptions of the two circuits were 1.2μW and 130 nW,respectively.