Design And Implementation Of A High Speed Data Acquisition And Recording System

With the emergence of high complexity digital circuit system,the quantity of data is increasing so quickly that the processing speed has become a bottleneck in it.Besides,the system usually has application requirements like high-resolution image or high-speed data acquisition,so the storage device with high-speed and large-capacity is becoming more and more necessary.The development of this storage device needs to address the following questions: system capacity,reading and writing data speed,error detection and error correction.This paper begin with the massive data acquisition,recording,storing and downloading with high speed,then a system with the character of high speed for downloading and high capacity for storing was proposed and implemented.This system is based on the FPGA platform,besides the data of it is stored in the FLASH and transferred by the USB3.0 interface.The system can fulfill the task of data acquisition and data storage,including analog signal of 31 channels,RS422 signal of 2 channels and video signal of 1 channel.The main work of this paper is as follows:1.The system based on FPGA platform makes full use of the reorganization advantage of FPGA programmable functions to adapt to different requirements in the same hardware,which can be reconfigured by various software.2.FLASH array as the storage medium takes advantage of bit extension and multichip cascade to improve writing speed and increase the capacity of the system.And based on its feature of short loading time and long programming time,we design the four level pipelined write mode,which can further improve the writing speed in the same bit width.3.ECC coding is displaced by RS coding and CRC coding which can detect and correct the burst data errors and greatly improved data integrity.4.USB3.0 interface is used to download the data in a high speed,and it can be used as power supply for the system.At the same time,it can automatically adapt to the existing USB interface of the PC processor.5.The method of static bad block management is used to reduce the cost of resources and improve the reliability of the system.Finally,the experiment result of the prototype shows that the design meets the requirements of the design input.