L-band Fast-lock Frequency Synthesizer

Phase-locked Loops(PLL) are widely used in many analog and digital systems,including clock generation, signal synchronization, frequency synthesis, FM demodulation,and clock and data recovery. The tuning range, tuning step, phase noise and settling time are vital properties of a frequency synthesizer. Settling time is a very important property for applications which need fast frequency switch time such as Frequency Hopping Spread Spectrum(FHSS) Communication Systems, Step Frequency Radars(SFR) and WLANs.Therefore, how to meet other performance under the conditions of the development of a rapid phase-locked loop has become a hot spot.The article introduces the background, technical indicators and research status of the frequency synthesizer. Analyzed the basic theory of phase-locked loop, combined with the project target, mainly focused on increasing the PLL lock time, and by amplifying the charge pump current as a starting point, analyzed and compared several methods of amplifying charge pump current. Finally, select the RF switch to switch RSET charge pump current to faster the lock time, and the feasibility of the program were demonstrated.This Program is based on the traditional method of dynamic loop bandwidth to improve lock time, but by increasing the charge pump current as a starting point to design and product, and by switch RSET to amplify the charge pump current, and the program is simple and effective, finally the lock-time has been significantly improved, and achieve the L-band fast locking. Finally, under the condition of meeting the phase noise, spurious and output power, achieved a fast lock frequency synthesizer, and the frequency is from1400 MHz to 1700 MHz and the frequency resolution is 10 kHz.Compared the lock-time of the front and improved program, and the lock time is in the forefront of the PLL.