Signal Integrity In High-speed Digital Circuit Design

The operating clock frequencies in chip, chip-to-chip, board-to-board and the density of the circuit have all been increased greatly nowadays. In addition, the duration of the transmitted pulse is getting narrower and the rise(and fall) time of the digital edges is getting shorter. To establish a reliable high-efficient and high-speed system and ensure the correct data transmission, signal integrity (SI) research has gradually become a hot issue in the interconnection design and received much attention.We first summarize the background of SI research, then introduce several typical SI problems and the corresponding solution ways in high-speed circuit. We summarize the brand-new methodology of designing high speed digital system which is based on the SI analysis and design and several popular softwares in this area. After that, we introduce the circuit design of LVDS (Low Voltage Differential Signaling) , which is a typical and popular high-speed differential data transmission standard in the industry. We study the effects of vias in high speed circuits, compare several different via structures by simulation and get a few suggestions of via designs. To establish the successful usage of XAUI (Quad transceiver utilizing 3.125 Gbit/second serial links to create a 10 gigabit Attachment Unit Interface) , which is a brand-new and very promising standard in this industry, we design and produce a high speed multiple-plane printed circuit board(PCB). The measurement data prove the improvement by careful SI design despite of the uncertainty of production. This kind of improvement is useful when designing high speed circuits.