Simulation Onelectrical Characteristics And Investigation Of Interface Properties Of High-k Gate Dielectric Ge MOS Device

With the development of the SiCMOS process, the MOS device has entered to nanometer size, and approaching its physical limits. New substrate materials and new structures must be needed to adopt to solve the huge challenges when further reducing the physical size of Si MOS device, and meeting the demand of high-performance and low-power in CMOS integrated circuit, so GeOI MOSFET has gradually been in a hot research in recent years because of the higher carrier mobility and the lower substrate capacitance. Therefore, This paper mainly studies the electrical characteristics of GeOI MOSFET to optimize the structure in the aspect of theory;As for experiment study, the interface properties of Ge/high-k gate dielectrics MOS capacitor has been studied.Theoretically,simulation of electrical characteristics and structural optimization for small-scaled high-k dielectric GeOI MOSFETs by the Silvaco TCAD device. A reasonable value range of germanium channel length, channel thickness, doping concentration, gate oxide thickness and permittivity is determined by analyzing short channel effect?SCE?, drain-induced barrier lowering?DIBL? effect and on-state current?Ion? and off-state current?Ioff?. It is found that the germanium channel thickness and channel length should be 4-7nm and 35-50 nm, channel doping concentration should be?5-11?×1017cm^-3, gate oxide thickness and permittivity should be 0.8-1.0nm and 15-35 so that excellent performances of the small-scaled GeOI MOSFET can be achieved.Experimentally,1) Ge MOS capacitor with Ta YON, Ta Si ON, Ta Al ON, Ta ON as interlayer respectively, and Hf Ti ON as high-k dielectric are fabricated. And the impact of different interlayers on interface properties and electrical characteristics of MOS capacitor between high k and Ge substrate. It is found that the Ge MOS device with Ta YON as passivation layer exhibits more sufficient improvement of interfacial quality and has a lower interface-state density and gate leakage current density;2) Ge MOScapacitor with Ta YON interlayer and Hf Ti ON high-k dielectric are fabricated, and the impact of NH₃ and N2 plasma treatment on the interfacial quality are investigated.Experimental results show that the NH₃ plasma treatment exhibits more sufficient improvement of interfacial quality than N2, resulting in better interfacial and electrical properties: large k value?25.9?, low interface-state density?6.72×1011e V-1cm-2? and oxide-charge density?-9.43×1011cm-2? and low gate leakage current density?4.53×10-5A/cm2 at Vg=1V+Vfb?.