Simulation On Electrical Characteristics Of GeOI MOSFET And Study On Interface Properties Of Ge/High-k Gate Dielectric

With MOS device stepping into the nanometer scale, conventional SiO2/Si system is unable to meet the requirements of integrated-circuit development. Using high-k gate dielectric can reduce gate leakage current but decrease channel carrier mobility too, resulting in low driving ability of devices. Therefore, it is necessary to use high-mobility materials and new device structures to enhance the comprehensive performances of the devices. GeOI(Germanium-On-Insulator) MOSFET with thin buried oxide layer, which has high mobility of channel carriers and electrostatic integrity, has become one of hot topics in recent years. In this thesis, both theoretical and experimental researches related to GeOI MOSFET are carried out, including device model and structure optimization of GeOI MOSFET, and interface properties of high-k gate dielectric Ge MOS device.Researches on device simulation include:(1)With surface potential and inversion charge obtained through solving two-dimension Poisson's equation, an analytical model for drain current of high k gate dielectric nanoscale GeOI pMOSFET is established. The drain current model includes velocity saturation, channel length modulation, and carrier mobility degradation. The model shows excellent concordance with the experimental datas. And, the influences of main structural and physical parameters on device performances, such as transconductance, cut-off frequency and voltage gain, are studied. Short channel with appropriate thickness and thin gate dielectrics with higher dielectric constant are required to optimize the comprehensive performances of device.(2) Influences of main structure and physical parameters of the dual–gate GeOI MOSFET on device performances are studied by TCAD 2D device simulator. A reasonable value range of germanium channel thickness, doping concentration, gate oxide thickness and permittivity is determined by analyzing on-state current, off-state current, short channel effect(SCE) and drain-induced barrier lowering(DIBL) effect of the GeOI MOSFET. When the channel thickness and its doping concentration are 10–18 nm and(5–9)?1017 cm–3, and equivalent oxide thickness and permittivity of gate dielectric are 0.8–1 nm and 15–30, respectively, excellent performances of the small-scaled GeOI MOSFET can be achieved.Research on experiments include: Preparation of Al/LaON/Si/ Ge MOS device. After growing up Si passivation layer on Ge substrate, plasma surface pretreate in N2 or NH3 is processed, respectively. Results indicate that the interface characteristics of Ge MOS has been significantly improved after NH3 plasma surface procession, which has low interface state density and small gate leakage current.