Device Models And Surface Pretreatment Technologies For GeOI MOSFET

In order to overcome the physical limits of conventional Si CMOS devices and meet the demand of low-power, high-performance Complementary metal-oxide-semiconductor(CMOS) integrated circuits for the next generation. Silicon-on-insulator(SOI) MOSFET is recognized as the most potential MOS devices in the future. The recent development of high-k gate dielectrics makes Ge become a potential candidate as the channel material because of the higher carrier mobility than Si. Therefore, the GeOI MOSFET has attracted much attention in recent years because of the higher carrier mobility and the advantages of SOI structure. However, the high-k gate dielectric can easily form GeOx interface layer when directly contact with Ge, which causes the performance degradation of GeOI MOSFET. Therefore, this paper mainly studies the interface properties of Ge/high-k gate dielectrics MOS capacitance. Two different high-k gate dielectrics(La AlON and La SiON) and surface pretreatments has been studied. we also fabricated Ge MOS device with YON as interface passivision layer to explore the impact of the passivation layer on the interfacial properties. As for theory study, threshold voltage model and the impact of quantum effects on the electrical characteristics of GeOI MOSFET has been studied.Researches on device simulation include:(1) The models of threshold voltage and subthreshold swing including the fringing-capacitance effects between the gate electrode and surface of source/drain region are established by figuring out Poisson equations of channel, and validity of the proposed models is confirmed by a good agreement between the simulated results and experimental data. Based on the models, some factors of impacting the threshold voltage and subthreshold swing of GeOI MOSFET are discussed in detail.(2) The impacts of quantum confinement on electrical characteristic of the ultrathin channel GeOI MOSFETs are investigated on the basis of the density-gradient model. It is shown that the electrically-controlled ability of the front gate of the devices are influenced by the quantum effect. Also, the quantum–mechanical mechanism would enhance the drain-induced barrier lowering effect, increase the threshold voltage and decrease the on-state current and the off-state current.Researches on experiments include:(1) The interface properties of Ge MOS capacitors with La AlON, La SiON as gate dielectric, respectively, are examined, and the impact of different plasma processing gas(N2, NH3) on interface properties are also examined. It is found that the interface properties of Ge MOS device with La Al ON as gate dielectric is better than the Ge MOS device with LaSiON as gate dielectric. And the interface properties of Ge MOS device with NH3 as the plasma processing gas is better than the one with N2 as the plasma processing gas.(2) The interface properties of Ge MOS capacitors with HfON as gate dielectric and YON as the the passivation layer is studied. And the impact of plasma treatment with NH3 as the plasma processing gas after that YON is deposited by magnetron sputtering on interface properties is also studied. The experiments show that the interface properties of Ge MOS capacitors with YON as the the passivation layer is better than the one without the passivation layer. The Ge MOS device with YON as the the passivation layer and being treated by NH3 as the plasma processing gas has the best interface properties.