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The Project Of Gigabit Ethernet (GbE) Test System Based On FPGA And ARM

Posted on:2017-01-04Degree:MasterType:Thesis
Country:ChinaCandidate:J B ChenFull Text:PDF
GTID:2348330488487103Subject:Control Science and Engineering
Abstract/Summary:PDF Full Text Request
In recent years,with the rapid development of computer networks,the GbE has become the main network technique,accordingly to improve the requirements about network devices become more and more important.As the properties of network devices will influence the stability and reliability directly in network running,so weather the network devices of the property would meet the needs of the system will become quite significant.Therefore,it is necessary to design an Ethernet test system to test the properties of network devices.However,the market of the GbE tester at present in China is mainly monopolized by abroad is of high price and complex operation.In view of the market demand,this article proposes to exploit a test system of GbE.It is not only easy to use,at a reasonable cost,in stable performance but also can implement the RFC2544 benchmark test.Let me narrate the main work and achievements as follows:1.The test system is mainly consisting of transceiver module,FPGA module,ARM module and display module of Ethernet.The PC as the upper computer in the traditional pattern,Change into making the ARM module as the upper computer.Making the function of handhold terminal come true,it is convent for testing and recording.The transceiver of Ethernet is mainly used in test frame.And FPGA module is mainly used in collecting and managing of test data.And ARM module is mainly used in processing of test data and controlling of whole test system.Display module is mainly used in testing operate and data display.2.In the development of software system,it is mainly to come true the properties test of RFC2544.First,design an Ethernet test frame that dedicated to testing.And then research the test algorithm of these four parameters about time delay,throughout,back-to-back,and packet loss rate,and based on the test system to realize it respectively.After that we use the Verilog HDL language to realize the properties of each module within FPGA module.At last,based on the Linux system to design an application program in Qt software to realize the control and display function of the whole test system.3.As the communication module,the transceiver module connects FPGA module by GMII interface to realize the transceiver of Ethernet test frame.FPGA module connects ARM module by USB interface to develop relevant driver program,and make the transmission between test data and control parameter come true.4.This thesis makes the tests of each module and whole construction of test system.The result of the test indicates that it can be realize the test function of the GbE property if the system works normally.There is a conclusion about the text at the end of the thesis and an outlook of the further work.
Keywords/Search Tags:GbE, Ethernet test, RFC2544, ARM, FPGA
PDF Full Text Request
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