The Analytical Method Of Cell-level 3D IC Power Delivery Network Based On Power-grid

The demand of power supply in 3D IC increases compared with 2D IC,the power delivery path is more complicated and the voltage drop of interconnect increases result from a large amount of current is needed, therefore the new problems of power supply delivery and performance arise. The power supply voltage has a tendency to gradually reduce and is not sufficient, voltage drop leads to the performance degradation, which cannot be ignore. Because of running time and memory, the estimation of 3D IC voltage drop becomes challenge.Based on the facts above, under 45nm manufacturing process, this paper studies the analytical method of cell-level 3D IC power delivery network based on power grids and proposes a 3D IC equivalent circuit model; The Gauss-Seidel iteration and Successive Over Relaxation method are applied to the actual 3D IC power network analysis, then the 3D-IC node-based method and 3D-IC improved node-based method are proposed. According to the equivalent circuit model of actual P/G mesh structure proposed in this paper, the calculation of the power grids is point by point and die by die, estimating the global static IR drop; According to the estimation of results, the power TSVs/bumps are inserted where the static IR drop is worst and violated to improved the IR drop of this region and around nodes.The simulation results on equivalent circuit model of 3D IC in 45nm technology proves that the convergence speed of 3D-IC improved node-based method is faster 140.43 times than the 3D-IC node-based method, the max difference of the average voltage between two methods this paper proposed is 0.04%, and the max difference of voltage standard deviation is 0.17%, the 3D-IC improved node-based method can effectively save memory and running time and quickly estimate the IR drop of large and complex 3D IC; Inserting power TSV/bump in the worst IR drop nodes effectively improves the static IR drop in those region where the IR drop doesn't meet constraint, the average voltage increases by 1.61% and the voltage standard deviation reduces by 21.43% after improvement.