Design And Implementation Of Observability Of Microprocessor Based ARM

With the computer and microelectronics technology continues to progress, in teaching of microprocessor design, it’s an important part of teaching research that how to strengthen the intuitive of learning the microprocessor architecture, and improve learning efficiency. Based on the completion of a compatible ARM coremicroprocessor system in this paper, improve the observability of the system by increasing internal observation module, and have built a certain observable capabilities of microprocessor architecture test platform. The platform can be applied to the study of microprocessor architecture to enable students to learn about about the internal structure and working principle of the microprocessor.Firstly, we completed a 32-bit RISC architecture microprocessor design and implementation work. The instruction is simpleand compatibility is well in this microprocessor. And it has a 3-stage pipeline architecture with a unified instruction and data cache. Secondly, this microprocessor and interrupt controller, external memory and other peripherals to form a complete system-on-chip via Wishbone bus. Finally, according to the teaching objectives of microprocessor architecture, the system to achieve the main function of the running state of the collection, storage and playback by adding hardware modules can be observed in the film on the system, and meet the requirements of internal microprocessor running state observer.This paper completed internal system-on-chip observing subsystem design, and the observation is achieved with Wishbone bus, fetch module, Cache module, decode module and execute module. And put the observation contents in the DDR2 memory, after the program is implemented, transfer them to PC via the UART. At the same time the content of the observations was designed and implemented based on a set of software within the chip signal Chipscope observation files. Enables a direct check on the results of observations. Further improve the observability of the entire platform, and enhanced platform availability.This paper are software simulation and hardware testing the microprocessor functions by EDA tools. And verify the correctness and availability of each module and the overall function.