Design And Implement 32-bit RISC Microprocessor

Embedded microprocessor has been applied widely to many kinds of electronic equipments for its advantage,such as,high performance,lower power cost and portable characteristic .Especially,as a strategy,Reduced Instruction Set Computer(RISC) is becoming more popular in the designing of computer architecture.In this paper,after introducing some leading commercial RISC technology,we discuss the designing and implement of 32 bits RISC microprocessor.Its instruction set is completely compatible with ARM instruction set. It is designed by 4-stage pipline,including instruction fetch,instruction decode,execution and memory access,we design the memory structure with hiberarchy.Firstiy,we present the data access based on the pipline,then we describe it with VeriiogHDL and simulate every module in order to validate it's correctness. As the same time,we introduce advance operation.Finally,we validate the whole design with instructions and generate the netlist.The RISC processor designed in this paper is mainly aim at middle and low level electric product in control field.As the cost is reduced,the flexibility of design is increased.This processor can be also integrated into SOC with IP core.In higher applications,it can be used as the coprocessor, can enhance the speed and ability of process more effective but not increasing the cost.