The High Voltage Gate Driver Ic Design Based On Low Delay Level Shift Circuit

High voltage gate driver ICs (HVICs) are widely used in white household appliances, electric vehicles, small and medium power industrial equipments due to its high reliability, low cost and intelligence. High voltage level shift technology is one of the core technologies of HVICs, and its characteristics will directly affect HVICs’performance and noise immunity, such as propagation delay, quiescent power consumption, dV/dt noise and VS negative bias. Therefore, it is significative to study the transmission characteristics and reliability of high voltage level shift circuits.Firstly, this thesis focuses on analyzing the HVICs’high voltage level shift technology. The production mechanism of dV/dt noise and VS negative bias as well as its immune technique have been investigated, which indicate that there is a contradiction between the reduction of propagation delay and the reinforcement of anti-noise reliability. An active load high voltage level shift technique is proposed in this thesis, and it can effetively reduce both the noise voltage drop across the load and the transmission voltage at the drain of LDMOS with the proposed adaptive load resistance. Therefore, the load noise is weaken and the VS negative bias tolerance of high voltage level shift circuit is improved. Secondly, the propagation delay characteristic of HVICs is investigated, indicating that the propagation delay of high side channel mainly comes from the high voltage level shift and noise filter. Adoption of fully differential hysteresis comparator can effectively reduce propagation delay and filter dV/dt noise, promoting the anti-noise reliability of HVICs.Based on the 700V 1μm BCD technology of Central Semiconductor Manufacturing Corporation, a high voltage gate driver IC adopted novel high voltage level shift circuit has been designed and tested. Test results show that the dV/dt noise immunity goes up to 85V/ns, the allowable negative swings to-10.54V with one 15V voltage source and the propagation delay of high side channel is approximately 93ns.