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The Research And Design Of High-speed Data Storage Based On The SATA Ⅱ Solid-state Disk

Posted on:2017-03-07Degree:MasterType:Thesis
Country:ChinaCandidate:L J WangFull Text:PDF
GTID:2308330485989249Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
In recent years, both in the field of military spaceflight telemetry and civilian large data transmission is undergoing the reform of high speed and large capacity data, Gigabit optical fiber communication technology has entered innumerable families. Under this background, people?s requirement of data transmission speed and storage capacity is higher and higher, and stricter requirement is required to the real time of the signal processing.In compliance with the big environmental requirements, a kind of portable high-speed data storage for the high requirements of large-capacity data storage, high speed, and high reliability of telemetry field is designed. In the topic, the cost-effective Spartan-6 series FPGA provided Xilinx Company is selected as control core, and high bandwidth X1 channel PCI-E is used as the front-end data transfer bus. In order to match the clock transmission, DDR3 SDRAM is chosen as the high speed data cache. At the back-end, data is stored to a SATA II SSD(solid-state drive) which has chosen high-speed serial transceiver as the physical bottom. It effectively overcomes the disadvantage of large volume and slow speed of parallel transmission. Since the current main controller of SATA II also use SOPC(system on programmable chip) to complete the design, a main control operation mode which does not depend on the operating system is proposed, saving the development cost and operating easily. The topic has realized SATA II bus transmission. At the same time, the PCI-E bus controlling data transmission and a data cache controller of DDR3 has completed.The hardware design of each module is completed and the logic design of each module is carried out on the project. After the completion of the design, the test about the correctness of data transmission and the speed adjustment of the SATA II,PCI-E link and the storage testing of DDR3 has been processed using IBERT, Chip scope debugging tools on the test platform. In addition, the SSD data read and writhed by PC has also been completed. The results show that the design can meet the requirements of design target and rate reaches 1 Gb/s storage capacity of 120 GB. The dissertation describes the work principle and the design process of each part in detail according to the completion of the work.
Keywords/Search Tags:High Speed Memory, SATA II, PCI-Express, SSD, High Speed Buffer
PDF Full Text Request
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