Design Of FPGA-based IRIG-B Code Decoder

With the increasing accuracy of measurement and control system, requirements for timing accuracy become higher and higher. As a relatively mature timing method, IRIG-B code, a kind of timing technology, has been widely used in military, aerospace, electric power system. IRIG-B code was developed by the US Inter-Range Instrumentation Group(IRIG) and has become an international standard time code. Our country has formulated the corresponding national standard and military specifications to regulate its pattern format and interface standards. Users use the decoder to obtain time information and the second pulse and the demodulation precision of decoder determines the timing accuracy of B code system.This paper first introduces the formats and interfaces of IRIG-B AC/DC code and the presently development of decoder. Besides, two kinds of AC B code demodulation method are simulated by simulation software. The paper also describes the system design of IRIG-B AC / DC code decoder based on FPGA in detail. According to the design requirements, the selection of chips relating to the the filter, signal conditioning circuit, analog digital conversion circuit, control circuit and other modules and the design of the external circuit is completed. It uses VHDL to write the FPGA internal control procedures, introduce DC B code demodulation method and two kind of AC B code demodulation method: digital demodulation and direct demodulation. DC B code demodulation is realized by using the method of pulse width counting. The digital demodulation method of AC code calls the multiplier and filter of the IP core to restore the AC B code to the DC B code. AC code direct demodulation method is to write FPGA program instead of the analog circuit and the AC code is converted into pulse signal processing. Finally, the advantages and disadvantages of the two methods are analysed. In addition, the method of second pulse delay timing is put forward to improve the accuracy of the decoder second pulse time points.According to the experiment : FPGA-based IRIG-B code decoder is capable of doing real-time demodulation between alternating current B code and direct current code B code. According to the format display of days,hours,minutes and seconds, using Lab VIEW write PC software, it is capable of storing time informations, then sending control command, transforming output mode, it has high accuracy of output decoding pulse, its design requirements achieve various function.