The FPGA Implementation And Verification Of Radar Signal Processing Key IP Cores

In the current design and implementation of SoC, the verification work account for 60 to 80 percent of the whole design, with the increasing complexity of design, the complexity and workload of verification are going to increase further. Verification has become the most time-consuming work in SoC design, in order to reduce the time to market and improve the efficiency of verification, higher requirements fcr SoC verification, the prototype verification based on FPGA provides a method for SoC verification are put forward, and has become a common means of verification in the design and implementation of SoC by virtue of its advantages.In this paper, the digital down convertor (DDC) module and pulse compression (PC) module are verified by combining software and hardware, it can provide guidance for the implementation of SoC in the radar signal processing. The main work is as follows:The main performance parameters of each module in the radar signal processor are calculated according to the radar system index, the plans of design and verification of DDC and PC are also drawn up.According to the requirements of the radar signal processing flexibility, the configurable DDC is designed with finite state machine technology. The design can configure the extraction number (1-7), filter state (15,31) and coefficients. The PC consists of pre-treatment module, input selection module, FFT processing module, matched filtering module and truncation module, a 32 to 4096 variable point and pipelined SDF architecture FFT processor based on radix-2 algorithm is proposed to design the RTL code of PC.Via the changing of the DDC and PC code, the prototype based on Xilinx FPGA Zynq XC7Z020-1CLG484C is realized. For the DDC, each module of DDC is simulated by Modelsim, then LFM signal is input to the DDC and the results of MATLAB simulation, Modelsim simulation and FPGA verification are presented and analyzed by contrast. For the PC, FFT module, the key of PC, determines the overall performance and area. First of all, the 4096 point FFT processor which is taken as an example is simulated with Modelsim, the result of FFT processor based on FPGA is also given, and by the comparison of these two results the function of the PC is verified. Secondly, the PC module is simulated by MATLAB, then the result based on FPGA is also provided to analyze the function of PC. Lastly, the PC module is verified in three different situations.