IP Core Design Of UART Based On APB And UVM Verification

With the increasingly higher performance of IC circuits and larger scale of SoC chips, it becomes more and more significant to rapid SoC product development and ensure the validity of function. Recently, with the technology exploration, general IP core packaging technology and UVM Verification methodology stand out from many methods. Consequently, according to the development trends and application requirements, this paper designs an UART IP core based on APB bus and establishes a general verification platform based on UVM 1.1 standard.This thesis had finished the following work.(1)A global structure of UART IP core was designed, supporting APB bus transmission protocols and infrared interface protocols concurrently.(2)A general verification platform based on UVM was designed, which adds the module to collect coverage rate automatically and adapts to general verification methods.(3)It makes detailed tests for IP core by verification platform and FPGA.The designed UART IP core, which packages some general circuits into an IP core and makes optimizations in hardware, could control the resource consumption and ensure performance as well.The results based on FPGA show, the IP core has good performance, it occupancy resources less than 20%,but it’s frequency can reach 210 MHz. The verification platform based on UVM has superior reusability and is suitable for more and more sophisticated design. The paper also make comparable verification between the designed IP core and reference model to ensure the validity, finally the overall coverage of close to 90%, the core function coverage rate reached 100%.