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An Ultra-low Power Digital Circuit System Design Used For The Sub-threshold Region

Posted on:2016-03-15Degree:MasterType:Thesis
Country:ChinaCandidate:Y M LiFull Text:PDF
GTID:2308330473955592Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
In recent years, digital integrated circuits were studied a lot and developed steady for the advantage of high integration and the strong ability on anti-noise. The traditional digital design is aimed at a high performance. However, in some situations, the power consumption is much more attractive than speed, which makes the low power design more and more important than ever before.For digital integrated circuits, working in the strong inversion region means high power consumption and low critical path delay. In order to seek a low power design method, the lower supply voltage is considered. The current research focus on subthreshold circuits makes it possible to achieve lower power for the sake of lower voltage.Also, as the key module of the digital signal processing, Fast Fourier Transformation processor plays an important role in digital circuits. In this paper, ultra-low power design theory and method are studied, and the subthreshold digital library is discussed and adopted to the present FFT processor. The method of ultra-low power design is used to research the achievement of FFT digital system.This paper presents a FFT processor, which can work in the subthreshold region. The function of FFT processor is simulated and verified. This FFT processor can be configured to calculate the 16- 1024 points FFT processing. The simulation indicates that the presented FFT processor can reach 100 MHz at 1.2 V and only 6 μW at 0.3 V with 300 Hz frequency.
Keywords/Search Tags:digital circuit design, ultra-low power, sub-threshold circuit, FFT processor
PDF Full Text Request
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