YHFT-DSP/MHM D Unit 600MHz Circuit Design And Optimization

Digital signal processor (DSP) is a class of embedded microprocessors which is very suitable for digital signal processing.Because of becoming a key component in many multimedia appliances,communication devices,DSP is required for higher performance.So it has more value on research and application.This thesis takes the design of 600MHz D unit for the background,researches the high performance DSP with a emphasis on critical path circuit optimized techniques and realizes 600MHz D unit.The main contributions are as follows:1. Analyse the D unit function and relative instructions,then finish the module partion,logic design,function verification,synthesis analysis.Find the critical paths and critical modules.Study optimized synthesis technology,writing successful RTL desc -ription ,improve the D unit architecture. Simulation results showed that after the optimi -zation the performance has been improved by 18%.Meanwhile supply precise data for critical path setting time target.2. Make the design scheme:critical modules custom design and others modules semicustom design.Compare different circuit implement method,choose good perform -ance speciality circuit to be used in critical module design.3.Study the advanced Sparse-Tree adder algorithm,design the circuit based on this architecture,then modify it creatively so that increase the circuit performance. Simulation results showed that after the optimization the performance has been improved by 25%.Skew CMOS circuit is introduced to adder design,make good balance between the power and performance.4.To improve the dynamic circuit reliability,study the noise tolerant precharge and skew cmos noise tolerant circuit and applied in the adder design.For keeping on getting higher performance,dual-Vt technology is also used in adder design.After these improvement technology is adopted in adder design the delay is 220ps compared to the former design 293ps.The layout simulation with RC parameters shows the adder delay is 520ps,almost can operate at 2GHz.5.Finish the high performance 32-bits shifter design.Finding the characteristics of the qiumo module,achieving the qiumo module in a smart way.Gather all custom modules and semicustom modules,connect them as the D unit circuit architecture,then make the simulation test for the function after finish all the custom modules design.At last finish the D unit place&route,the simulation results showed that the target of 600MHz D unit is achieved.