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Research And Implementation Of The LDPC Technology Of Encoding And Decoding

Posted on:2016-05-05Degree:MasterType:Thesis
Country:ChinaCandidate:X Z KongFull Text:PDF
GTID:2308330473955079Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
Nowadays, mobile communication develops rapidly and it has made a great effect on every aspect of people’s life and has brought much convenience to them. The applica-tion of Error Correction of Coding plays a key role in mobile communication technolo-gy. LDPC(Low Density Parity Check) code is one kind of Error Correction of Coding which is a good code because of its near Shannon limit performance in the high code rate range.This thesis has completed a QC-LDPC coder and decoder which is suited for multi code length and multi code rate based on 802.16 e. The algorithm of coding and decoding has been studied. The coding algorithm is mainly Gaussian elimination method and Efficient Coding Algorithm. We choosed the Efficient Algorithm which is suited for the structure of quasi-double diagonal in 802.16 e. In order to complete the high speed LDPC coder, we make full use of the pipeline and partial-parallel structure.This thesis made a description of the LDPC decoding algorithm such as belief propagation decoding algorithm and normalized min-sum decoding algorithm. Finally, we choosed the later one. We focused on two kinds of implementation structures—TDMP and TPMP. The iterations of TDMP structure is less 50% than TPMP structure. After the comparison, we used the TDMP structure in decoding. The BER of the system can achieve 10-6 when SNR is 2.5dB. Besides, the implementation of LDPC decoding also used the Ping-Pong operating and pipeline technology to improve the performance of the decoders.The thesis has made a complementation of a QC-LDPC coder and decoder on XC705 board of Xilinx which is multi code length and code rate. The maximum code length is 2304 and the code rate is 1/2, 2/3, 3/4 and 5/6. The maximum frequency of the system is 250 MHz and the throughput of coder and decoder is 13.7Gbps and 1.65 Gbps.
Keywords/Search Tags:QC-LDPC, TDMP, Efficient Algorithm, Normalized MSA, FPGA
PDF Full Text Request
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