Research On SCR-based ESD Protection Devices

ESD protection is one of the most important branches of the reliability of Integrated Circuits. It is becoming more difficult and challenging because of the development of the semiconductor manufacturing process and the increasing complexity of the IC’s. The ESD protection device is the smallest unit in ESD protection, choosing and devising the proper ESD protection device is the key point of the whole-chip ESD protection. This paper provides the research of normal ESD protection device such as diodes, NPN transistors, GGNMOS, and SCR. Diode has a simple working mode without snapback and has low turn-on voltage, high ESD protection ability. The parasitic NPN transistor of GGNMOS takes the role to shunt ESD current, so we research the working mode of NPN transistor. GGNMOS has a moderate trigger voltage and ESD protection ability ordinarily with multi-finger layout style. Unfortunately the fingers can’t be turned on uniformly. SCR is the key device of this paper, normal SCR has a deep snapback curve,high trigger voltage, low holding voltage, high ESD protection ability,but it has latch-up problem.As normal ESD protection device do not have a bi-directional ESD protection ability, this paper present several solutions including diodes based solution and SCR based solution. In addition, this paper present a novel bi-directional SCR with high holding voltage(20V) and low trigger voltage(23V), analyze the influence of the device parameter to its ESD protection characteristics. It is suitable for ESD protection in high voltage IC’s. In order to increasing the holding voltage, this paper provides a methodology by stacking the SCR together. The holding voltage can be adjusted to meet different ESD requirements by changing the stacking unit number. With 3 units stacking together, we get 60 V holding voltage and 69 V triggering voltage.SCR with high triggering voltage is one of the most important problems of SCR usages in ESD protection, there are two ways to decrease the triggering voltage, one is inside triggering solution, the other is outside triggering solution. MLSCR and LVTSCR use the first method. GGSCR and Diode-trigger SCR use the second method. In this paper we present a novel structure of GGNMOS and PMOS to trigger SCR, the novel GGNMOS decrease its triggering voltage from 11.7V to 10.6V, and novel PMOS decrease from 10 V to 8.5V, its second breakdown current is increased too.