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Evaluation of utilizing PMOS transistors for substrate noise reduction in a 2.4-GHz receiver

Posted on:2007-07-24Degree:Ph.DType:Dissertation
University:University of FloridaCandidate:Yu, ChikuangFull Text:PDF
GTID:1448390005974518Subject:Engineering
Abstract/Summary:
System-on-chip (SoC) design combining front-end circuits, base band analog circuits, and digital signal processing (DSP) circuits is becoming the solution of choice for the consumer communication market. However, this high level of complexity and integration results in noise coupling from the digital circuitry to the RF and analog circuitry. The noise coupling if not properly handled can significantly degrade the system performance. Reducing this noise coupling is important and essential.;Use of p-channel metal oxide semiconductor (PMOS) transistors in an isolated n-well for implementing RF circuits to lower the effects of substrate noise coupling is examined. 2.4-GHz PMOS and NMOS low noise amplifiers (LNAs) for Bluetooth applications are developed using 0.18-microm CMOS technology. Both utilize the common-source single-ended topology with inductive source degeneration. The PMOS and NMOS LNAs achieve 15- and 20-dB power gain with 3- and 2-dB noise figure, respectively. Compared to NMOS LNA, PMOS LNA has ∼3dB lower gain and ∼1dB higher noise figure. However, the PMOS LNA has better linearity. The IIP3 of PMOS LNA is about 6--8 dB higher than that of NMOS LNA. Both PMOS and NMOS LNA are acceptable for Bluetooth applications.;PMOS and NMOS mixers for Bluetooth applications are also developed using 0.18-microm CMOS technology. Both are Gilbert-cell double-balance active mixers. The PMOS and NMOS mixers achieve 6- and 9-dB conversion gain with 8- and 9-dB noise figure, respectively. Compared to the NMOS mixer, the PMOS mixer has ∼3dB lower gain, slightly lower double-sided-band noise figure (DSB NF), and comparable third order input intercept point (IIP3) and input 1-dB compression point (IP1dB). The PMOS mixer has ∼10dB lower flicker noise than the NMOS mixer so the PMOS mixer is better for direct conversion mixers.;An 8-stage tapered buffer which can generate switching noise and the LNAs are built on a single chip. The increase of noise figure of PMOS LNA in the presence of buffer digital noise injection is about 10--15 dB lower than that for the NMOS LNA at harmonic frequencies and ∼0.2--0.4 dB lower for white noise. Noise coupling for LNA with the shared ground with the buffer is ∼2--3 dB higher than those with separated grounds. The measurements indicate that the PMOS LNA has better noise immunity than the NMOS LNA.;The LNA noise figure decreases as the frequency of input signal is increased. This is due to the fact that white noise generated by the buffer is dominated by the noise of input source and its impact on buffer output noise increases with increasing rise and fall times, because the noise is amplified by the buffer for a longer duration.;The simulations and measurements indicate that the dominant noise coupling is inductive coupling through the buffer on-chip power line and LNA input bond wire. As a matter of fact, in the LNA/buffer test structure used in this study, the substrate coupling was negligible.
Keywords/Search Tags:PMOS, Noise, LNA, Substrate, Coupling, Buffer, Circuits
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