Research And Design For An Asynchronous SAR ADC

In many types of ADC, successive approximation ADC (SAR ADC) with moderate accuracy, small size, low cost and low power consumption is widely used in consumer electronics, data collection and many other fields.In recent years, with the development of microelectronics technology, the CMOS process feature size is decreasing, and the speed and accuracy of SAR ADC is constantly developed, the power supply voltage and power consumption is lowering, therefor SAR ADC has become a research hotspot.Based on the analysis of traditional synchronous SAR ADC circuit working principle, structure and characteristics is adopted to achieve 8 bit,10 MS/s sampling rate of successive approximation analog-to-digital conversion. Firstly system modeling is built on the MATLAB platform, and analyse clock jitter, switch nonlinearity, disorder of the comparator, the non-ideal effects such as capacitor mismatch, noise effect on the circuit. Then key circuit modules is analysed and designed, including the asynchronous sequential logic circuit, which can effectively improve the conversion rate and reduce the power consumption of the whole; using two-stage dynamic comparator, which can increase speed and reduce the static power consumption; the improved segmented capacitor array structure, DAC and sampling capacitors reuse technology can effectively reduce the circuit layout area. Because od asynchronous sequential structure, the conversion rate is effectively improved, the peripheral circuit is reduced, the clock module design complexity is reduced, which can reduce the chip area, and also reduce the power consumption of the system as a whole.Based on the SMIC 65 nm CMOS technology, the Cadence Spectre software is used for module simulation and the overall circuit simulation.Reference voltage is 1.2 V, power supply voltage is 1.2 V, sampling rate is 10MS/s, the input sampling signal is sine wave, and the simulation results show that, when the input signal frequency is 4.84375 MHz, ENOB= 7.85 bit, SNR= 53.56 dB, SNDR= 49.06 dB, SFDR= 56.81 dB.Using a linear fitting method, INL (max)= 1.306 LSB, INL (rms)= 0.992 LSB, DNL (max)= 2.004 LSB, DNL (rms)= 1.39 LSB, static power is 25 uV, and all indexes meet the design requirements.