Improvement And Implementation Of Object Tracking Algorithm In Intelligent Video Analysis

Software Defined Radio(SDR) technology as the third revolution in the field of communications, has been rapid development in recent years,while the baseband digital signal processing as a key technology of SDR is also favored,the realization of SDR relies on a powerful platform of high-speed baseband digital signal processing.The traditional platform of high-speed baseband digital signal processing is configured of a single processor such as FPGA or DSP.The single processor can not meet the needs of SDR because of their disadvantages.The current mainstream platforms of high-speed baseband are all configured of the combination of multiple processor architecture.This paper studies and implementes the platform of high-speed baseband digital signal processing based on FPGA+DSP architecture.FPGA is suitable for logic control,while the capability of the realization of complex digital signal processing is far less than the special purpose processor DSP,and the capability of fast and flexible addressing modes of DSP makes up for the lack of FPGA.The platform of high-speed baseband digital signal processing which builds on the architecture of FPGA+DSP combines the both advantages of FPGA and DSP,and the performance of the platform has been greatly improved.A appropriate high-speed interface is needed for the high-speed data exchange between FPGA and DSP,the serial rapidly input/output interface(SRIO) can satisfy the needs of system Interconnect.The maximum theoretical data transfer speeds of SRIO is up to 20 Gbps,while having significant advantages such as a high efficiency of data package,low delay,the capability of hardware error correction and flexible expansion.Meanwhile,the paper addes the modules of Analog-to-Digital converter(ADC) and Digital-to-Analog converter(DAC) to build a integral platform of high-speed baseband digital signal processing which is from the data collection of the front-end to the analog recovery of the back-end.In this paper,we select the TMS320C6678 which is TI’s 8-core processor based on the Keystone architecture for the DSP chip and EP4SGX70HF35C3 which is a series of ALTERA’s Stratix IV GX FPGA chips,we select TI’s ADS4229 as the AD and DAC3152 as the DA.Firstly,this paper designed the overall scheme for the system’s realizations and analysis the performance of each devices in detail.Then introduced the SRIO protocol detailly and designed the high-speed adapter plate between FPGA and DSP,then implemented the LINK、NWRITE、NREAD、Doorbell and other related test between FPGA and DSP using the SRIO high-speed data exchange.Finally,adds the AD data acquisition module and DA converter module and gives a sine wave and triangle wave signal pass-through test.