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Research On The Hardware Design Of A Multicore DSP High-speed Video Processing Systerm

Posted on:2016-11-06Degree:MasterType:Thesis
Country:ChinaCandidate:L QuFull Text:PDF
GTID:2308330503954638Subject:Electronics and Communications Engineering
Abstract/Summary:PDF Full Text Request
With the rapid development of devices acquiring video image and digital image processing technology, the video images are also toward the standard of high frame rate and high resolution. Using the images with high frame rate, we can not only bring a large number of image information, but also an enormous amount of calculation, so we need to research on high-performance real-time processing platform.This paper set up a video image processing platform with the architecture of multi-core DSP and FPGA to meet the requirements of latter goal tracking and detection algorithms. The core processors of the system are TI’s DSP TMS320C6678 multi-core system and Xilinx’s FPGA XC5VLX110 T. Images are captured through the Camera-link interface and the data are buffered to the FPGA peripheral memory DDR2. After data preprocessing through FPGA, data are transferred to DSP’s external memory DDR3 via high-speed interface SRIO. Complex arithmetic is processed by the DSP and the results are outputted by the network port or transmitted by serial port. The system has strong versatility and portability. The system has abundant logic resources in FPGA, and the capacity of complex calculation by DSP. The research work is from the following aspects:Firstly, this article introduces the overall design concept and demand indicators of the system, and analyzes the data stream. Secondly, according to the system requirements, we select the primary processing device and introduce the infrastructure and new technologies of multi-core DSP, compare the difference in speed and stability of systems between the two inter-core modes. Thirdly, we analysis the overall performance of the system, design the system block diagram. Furthermore, according to the system program, we estimate the power consumption of the whole system and complete power supply design. Then complete the circuit design of clock, peripheral storage, high-speed interface and video interface, draw a schematic diagram of the video signal processing platform and consider signal integrity problems in laminate and layout design of PCB. Finally, research the technology of the secondary loader boot with multi-core DSP, and set up the SYS / BIOS real-time system.
Keywords/Search Tags:TMS320C6678, FPGA, SRIO, signal integrity
PDF Full Text Request
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