Design Of Burst Communication Receiver And FPGA Realization Of The Corresponding Modules

The M-ray Spread Spectrum and Frequency Hopping can be combined into an Hybrid Spread Spectrum Communication System.The Hybrid Spread Spectrum Communication System intergrates the advantages of the two techiniques and it enhances the anti-interference and anti-interception ability. This thesis studies the receiver of the Burst and Hybrid Spread Spectrum Communication System and finishes the total receiving scheme and the FPGA design of the related modules. The main contributions are as follows:l.The real-time capture of long code is studied. The frequently-used synchronization capture methods are introduced, including Match Filtering method, Sliding Correlating method, Sequential Estimation Quickly Capture method, Phase Sequence Search method and so on. Considering the system requirements, this thesis uses a method which is a combination of matching correlation method and FFT spectral analysis method(PMF-FFT method). This thesis analyzes the principle of this method, gives the derivation process, puts forward the realization scheme and gives the FPGA realization.2.The FFT demodulation method based on CCSK coding is studied. Because modulation level is 256(M=256), the complexity of the realization is very high if demodulation uses correlators directly. The thesis uses FFT demodulation method which can greatly reduce the demodulation complexity. Firstly, this thesis analyzes the principle of the method and gives the derivation process. Secondly, the thesis puts forward the realization scheme and gives the FPGA realization of this method.3. Delay Locked Loop is studied. When the synchronization head sequence is captured, the system needs to adjust the sampling moment in order to sample at the best moment. Firstly, this thesis introduces the principle of Delay Locked Loop. Secondly, this thesis gives the realization scheme. Lastly, the FPGA realization is given.4.RS decoding is studied. The ability of error correction of RS code is very strong. The reliability of the system is improved if RS code is used. This thesis introduces the principle of RS decoding and gives the realization scheme and the FPGA realization.5.Wave form simulations of the modules introduced above are given and the results are correct.