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Tpc Encoding And Decoding Algorithm And Implementation

Posted on:2009-05-16Degree:MasterType:Thesis
Country:ChinaCandidate:Y XieFull Text:PDF
GTID:2208360245479481Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
In 1994, P.Ryndian investigates Turbo Product Code. It is a kind of block code, of which sub-code is linear code .Its decoding method adopts SISO iterative, the same as Turbo Code, especially simpler decoding method. So, it becomes the focus of the coding area, and will be widely applied in high speed communication.In this paper, the code and decoding principle of TPC is firstly researched. Its coding method is similar with Product Code's. The contents of coding section are that two and more than linear sub-codes form a code block, and then each dimension is coded separately. These sub-codes can be the same or not, Hamming code, extended Hamming code, BCH code, single parity check code , and so on. In the same time, the whole realization scheme of TPC coding based on FPGA, including design flow and unites coder are discussed in detail. And takes sub-code (8, 4) and (64, 57) extended Hamming code for example. IDE adopted is QuartusII-5.0 of Altera Company.The iterative decoding for TPC is discussed, with a typical Chase iterative decoding algorithm for the representative, and simulating in Matlab7.0 environment. The overall TPC decoding module design using FPGA, combined with existing AHA4501 chip, and further verify the performance of TPC decoding. TPC show effective performance in communication system.
Keywords/Search Tags:TPC code / decoding, Chase algorithm, FPGA realization, Channel code
PDF Full Text Request
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