The Signal Integrity Analysis Of Very High Speed Integrated Circuits

With the increment of work frequency of very high speed integrated circuit(VHSIC), interconnect has a large effect on signal integrity as the length of interconnect approaches to wavelength of signal and the signal performs as the electromagnetic wave. Interconnect design has become increasingly more important in VHSIC physical design, because of the serious signal integrity(SI) problem. The design of VHSIC needs the guidance of the theory of SI.As the third generation semiconductor material, In P has superior optical and electrical characteristics, high electron mobility, high saturated speed and good frequency characteristic. Having the advantages of high characteristic frequency and oscillation frequency over homojunction transistors, In P HBT has found its wide application in the fields of microwave millimeter wave, mobile communication and compound very high speed digital ciucuits, etc. Microwave circuits and VHSIC based on In P HBT have a working frequency as high as 100 GHz. SI problem frequently appears in VHSIC physical design, thus the layout and design of interconnect is of great significance to the realization and improvement of circuit function.This paper puts forward suitable SI analysis tools such as fastcap/fasthenry and ADS momentum for In P HBT technology. Fastcap/fasthenry can model the interconnect to obtain its parasitic parameters. ADS momentum can analyse all coupling effects of interconnects in layout. Through the above two tools, an analysis of different SI problems in In P HBT technology has been made. This paper probes into the effect of interconnect length and width on interconnect time delay, and discusses the differences of calculation of interconnect time delay in different interconnect circuits models. It also discusses crosstalk of single end interconnect and differential interconnect, and analyses the effects of different interconnect parameter on crosstalk. In addition, this paper elaborates on the effect of interconnect discontinuity to interconnect characteristics, and analyses phenomenon of interconnect width step, interconnect bends and interconnect via. In the end, this paper proposes optimization methods in interconnect layout physical design for different SI issues. The above conclusions may provide reference for the design of VHSIC layout.