Research On Key Technologies Of NoC Based On Multicast Application

With the rapid development of Integrated Circuit (IC), more and more function modules are integrated on a single chip. Traditional Chip Multi-Core Processor (CMP) based on shared bus interconnection cannot meet the requirements in communication bandwidth, synchronization, signal delay, scalability, etc. Network-on-Chip (NoC) emerges as a very promising interconnection pattern, which not only solves the common problems faced by shared bus based System-on-Chip (SoC), but also provides good parallel processing capacity. Therefore, NoC-based many-core chip has become the mainstream of current trends and research focus. The key research points in NoC such as topology, mapping algorithm and scheduling mechanism have been deeply studied. With the commercial use of NoC-based many-core chip, the testing of NoC-based many-core chip has become a new research focus. The testing of NoC-based many-core chip can be classified in two categories:the testing of network communication architecture and the testing of many cores. In order to solve the problems such as long testing time and high power consumption encountered in the testing process, effective multicast routing algorithm is needed. Moreover, multicast also plays an important role in distributed and shared cache system and single program multiple data programming model.Firstly the background and development of NoC is introduced. Then we summarize and describe some basic concepts and key technologies in NoC after studying the research achievements and tendencies in academic and industrial fields. The design process of SoC and NoC is also introduced, particularly the key technologies in the testing of many-core chip, common problems encountered in the testing and the multicast communication pattern in many cores. A new double-layer sparse honeycomb topology based on specific application for NoC is proposed. Compared to the traditional brick layout based honeycomb network, the new topology has simple structure and is easy to implement. A subnet-divided based multicast routing algorithm is designed according to its structure features. Finally, we develop a platform by multiplexing NoC communication architecture for the testing of many cores. The platform abstracts the traditional ATE testing module function and adopts a global control module. The congestion in the transmission is alleviated by controlling the amount of IO of the input port and the location of the source node connected to ATE data generating module. A region-divided multicast algorithm is designed for the testing platform to achieve the unity of the testing process. This algorithm can reduce the transmission time of testing data and increase the parallelism of the testing. By validating the node function, it turns out the correctness of design and implementation.