Research On FPGA Reliability Design Of Aerospace Applications

With the rapid development of deep space detection technique, the system function of increasingly complexity is expected to be realized. The amount of processing data,the improvement of computing intricacy and the expanding of reliability requirements restrict the application of device in space. As a programmable logic device, FPGA has a high level of integration, repeatable programming, wide applicability etc., and is widely used in the field of aviation, military and civilian electronic products. But in space applications, the type of FPGA based on SRAM is easily affected by various kinds of cosmic radiation producing Single Event Upset(SEU), the cumulative effect of which will result in the system collapsion. This kind of errors phenomenon makes the reliability problems become a development bottleneck of FPGA in space applications.Taking Xilinx XC2V3000 as an example, this paper aimed at the reliability of FPGA comes up with a solution——scrubbing. As one of the Active Partial Reconfiguration, scrubbing reconfigures part of the resources of FPGA to correct errors caused by Single Event Upset(SEU) to meet the reliability requirements of space applications, taking advantage of repeated programming and on the premise of without breaking system work state. Based on the research of FPGA,including the basic architecture, all kinds of resources and the initialization configuration process, the following two research results are proposed to implement scrubbing technology:1. Adoptting mask way to generate partial bit file for scrubbing. The certain resources needed to be scrubbing in three kinds of resources are picked out through the instructions-input window of ISE10.1 software of Xilinx company, and then generate the corresponding partial bit file,with which the original bits to form a new whole bit files stored in the PROM. When steps to scrubbing operation, the partial bit file is read out to reconfigure FPGA so as to correct errors produced by SEU.2. Adoptting bit refactoring way to generate partial bit file for scrubbing. On the basis of in-depth study of configuration data, meaning of instructions and composition of bit file, the instructions of configuring attribution, the start address,amount and content of configuration frame are modified so as to achieve the aim of reconstituting original bit file. What need to do by this way is reading out the original bit file stored in the PROM,which is reconstituted to do scrubbing on FPGA.According to two kinds of research results above, this paper shows the diagrams of corresponding system structure and the state transition realizing the timing sequence, and completes the system simulation results. At the same time, the respective advantages and disadvantages of these two kinds of research achievements and their applicable conditions are analyzed. Finally, in view of the problem whether scrubbing technology can truly realize correcting errors produced by SEU or not, a valid and simple method is proposed. To simulate SEU occurrence, the bit file different from the former in function is generated by FPGA Editor tool of ISE10.1 software through modifying the F or G function of lookup table,on the principle of less in modification and mutual difference in function. With scrubbing technology, switching back and forth between the two different functions is achieved, which verifies the SEU can be corrected successfully.