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Analysis And Design Of Video Preprocessing Algorithms And Video Magnifier System Of High Definition

Posted on:2016-11-25Degree:MasterType:Thesis
Country:ChinaCandidate:L M ChenFull Text:PDF
GTID:2308330464467291Subject:Control Science and Engineering
Abstract/Summary:PDF Full Text Request
With rapidly increasing population of the aging, the weak-vision problem becomes more seriously. The electronic video magnifier can be used to improve the visual ability of old people and has played an important role in their daily lives. At the same time, FPGA has been coming into digital image processing field due to the development of FPGA technology. Therefore, study of electronic video magnifier systems using FPGA is an interesting topic with good innovation significance and practical value.In this thesis, video preprocessing algorithms of video magnifier systems are first proposed, including zooming and discoloration algorithms. Then an HD video magnifier system is designed using the Xilinx Spartan-6 platform that has the FPGA’s powerful parallel processing capabilities. The main work and results are summarized as follows:(1) The current research status on video magnifier devices, image zooming algorithm and discoloration algorithm is deeply explored. The reason that FPGA is selected as the platform system design is given.(2) Two core algorithms in the video magnifier system are introduced, which are image zooming and discoloration algorithms. In terms of an image zooming algorithm, the nearest neighbor interpolation algorithm, bi-cubic interpolation algorithm and hierarchical linear interpolation algorithm are analyzed, by which a hierarchical linear interpolation algorithm is proposed. Then a detailed data analysis is conducted to verify the validity of the above algorithm. On the other hand, a discoloration algorithm with the middle computation complexity is presented. Finally, the optimization and improvement direction of the discoloration algorithm are proposed.(3) The overall scheme and process of the system are designed. The main modules, including clock management, camera acquisition, RAM reading and writing, LCD display, and the two core algorithms previously mentioned, are implemented by Verilog language in Xilinx FPGA hardware platform.(4) The design of system schematic and PCB are completed based on the Xilinx Spartan-6 platform. Using Siwave simulation tool, a better PCB layout is obtained and the power integrity and anti-jamming ability of the system are further improved. Finally, the designed hardware system is tested and validated.
Keywords/Search Tags:Video Magnifier, FPGA, Video Preprocessing Algorithm, Power Integrity Analysis
PDF Full Text Request
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